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Image processing apparatus implemented in IC chip

  • US 20020181597A1
  • Filed: 05/24/2002
  • Published: 12/05/2002
  • Est. Priority Date: 06/01/2001
  • Status: Active Grant
First Claim
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1. An image processing apparatus, comprising integrally:

  • a first block including;

    a front-end decoder which decodes a first coded data sequence; and

    a first display circuit which generates an image video signal from data decoded by the front-end decoder;

    a second block including;

    an image input circuit which converts the image video signal, outputted from said first block, to a video data sequence; and

    an encoder which codes the video data sequence into a second coded data sequence; and

    a third block including;

    a back-end decoder which decodes the second coded data sequence outputted from said second block; and

    a second display circuit which generates an image video signal from data decoded by the back-end decoder, said first block, second block and third block being integrally mounted, wherein, for at least one block of said first block, second block and third block, all components included in said at least one block are mounted as part of a single integrated circuit (IC) chip.

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