Method and apparatus for isolating failing hardware in a PCI recoverable error

• US 20020184576A1
• Filed: 03/29/2001
• Published: 12/05/2002
• Est. Priority Date: 03/29/2001
• Status: Abandoned Application

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Henderson, Daniel James, OʼQuin, John Thomas II, Arndt, Richard Louis, Willoughby, David R., Kovacs, Robert George
• Application Number:
  US09/820,459
• Publication Number:
  US 20020184576A1
• Time in Patent Office: Days
• US Class Current: 714/48
• CPC Class Codes: G06F 11/0712 in a virtual computing platform, e.g. logically partitioned systems
• CPC Class Codes: G06F 11/076 by exceeding a count or rate limit, e.g. word- or bit count limit
• CPC Class Codes: G06F 11/079 Root cause analysis, i.e. error or fault diagnosis in a hardware test environment G06F11/22; in a software test environment G06F11/36

Abstract

A method, apparatus, and computer implemented instructions for isolating failing hardware in a data processing system. In response to detecting a recovery attempt from an error, an indication of the attempt is stored. A hardware component associated with the error is placed in an unavailable state in response to the error exceeding a threshold for errors.

Claims

1. A method in a data processing system for isolating failing hardware in the data processing system, the method comprising:

responsive to detecting a recovery attempt from an error for an operation involving a hardware component, storing an indication of the attempt; and

responsive to the error exceeding a threshold, placing the hardware component in an unavailable state.

2. The method of claim 1 further comprising:

clearing the unavailable state of the hardware component in response to a hot-plug action replacing the hardware component.

3. The method of claim 1, wherein the placing step comprises:

making a call to a hardware interface layer to place the hardware component into a permanent reset state.

4. The method of claim 1, wherein the indication is stored in an error log.

5. The method of claim 1 further comprising:

responsive to a selected number of recovery attempts occurring, recreating the error.

6. The method of claim 1, wherein the error is an error caused by a PCI bus operation.

7. The method of claim 1, wherein the detecting and placing steps occur in a firmware layer within the data processing system.

8. The method of claim 1, wherein the detecting step occurs in a device driver and placing steps occurs in a firmware.

9. The method of claim 1, wherein the threshold is the error successively a selected number of times.

10. A method in a data processing system for handling errors, the method comprising:

responsive to an occurrence of an error, determining whether the error is a recoverable error;

responsive to a determination that the error is a recoverable error, identifying slots on the bus indicating an error state;

incrementing an error counter for each identified slot; and

responsive to the error counter exceeding a threshold, placing the slot into a permanently unavailable state.

11. The method of claim 10 further comprising:

responsive to the error counter failing to exceed the threshold, placing the slot into an available state, wherein a device within the slot resumes functioning.

15. The data processing system of claim 14 further comprising:

clearing means for clearing the unavailable state of the hardware component in response to a hot-plug action replacing the hardware component.

16. The data processing system of claim 14, wherein the placing means comprises:

means for making a call to a hardware interface layer to place the hard ware component into a permanent reset state.

17. The data processing system of claim 14, wherein the indication is stored in an error log.

18. The data processing system of claim 14 further comprising:

recreating means, responsive to a selected number of recovery attempts occurring, for recreating the error.

19. The data processing system of claim 14, wherein the error is an error caused by a PCI bus operation.

20. The data processing system of claim 14, wherein the detecting means and the placing means are located in a firmware layer within the data processing system.

21. The data processing system of claim 14, wherein the detecting means is located in a device driver and the placing means is located in a firmware.

22. The data processing system of claim 14, wherein the threshold is the error successively a selected number of times.

24. The data processing system of claim 23, wherein the placing means is a first placing means and further comprising:

second placing means, responsive to the error counter failing to exceed the threshold, for placing the slot into an available state, wherein a device within the slot resumes functioning.

26. The computer program product of claim 25 further comprising:

third instructions for clearing the unavailable state of the hardware component in response to a hot-plug action replacing the hardware component.

27. The computer program product of claim 25, wherein the placing step comprises:

third instructions for making a call to a hardware interface layer to place the hard ware component into a permanent reset state.

28. The computer program product of claim 25, wherein the indication is stored in an error log.

29. The computer program product of claim 25 further comprising:

third instructions, responsive to a selected number of recovery attempts occurring, for recreating the error.

30. The computer program product of claim 25, wherein the error is an error caused by a PCI bus operation.

31. The computer program product of claim 25, wherein the detecting and placing steps occur in a firmware layer within the data processing system.

32. The computer program product of claim 25, wherein the detecting step occurs in a device driver and placing steps occurs in a firmware.

33. The computer program product of claim 25, wherein the threshold is the error successively a selected number of times.

35. The computer program product of claim 34 further comprising:

fifth instructions, responsive to the error counter failing to exceed the threshold, for placing the slot into an available state, wherein a device within the slot resumes functioning.

12. A data processing system comprising:

a bus system;

a communications unit connected to the bus system;

a memory connected to the bus system, wherein the memory includes as set of instructions; and

a processing unit connected to the bus system, wherein the processing unit executes the set of instructions to store an indication of a recovery attempt from an error in response to detecting the recovery attempt; and

place the hardware component in an unavailable state in response to the error exceeding a threshold.

13. A data processing system comprising:

a bus system;

a communications unit connected to the bus system;

a memory connected to the bus system, wherein the memory includes as set of instructions; and

a processing unit connected to the bus system, wherein the processing unit executes the set of instructions to determine whether the error is a recoverable error in response to an occurrence of an error;

identify slots on the bus indicating an error state in response to a determination that the error is a recoverable error;

increment an error counter for each identified slot; and

place the slot into a permanently unavailable state in response to the error counter exceeding a threshold.

14. A data processing system for isolating failing hardware in the data processing system, the data processing system comprising:

storing means, responsive to detecting a recovery attempt from an error, for storing an indication of the attempt; and

placing means, responsive to the error occurring in the more than a threshold for a hardware component, for placing the hardware component in an unavailable state.

23. A data processing system for handling errors, the data processing system comprising:

determining means, responsive to an occurrence of an error, for determining whether the error is a recoverable error;

identifying means, responsive to a determination that the error is a recoverable error, for identifying slots on the bus indicating an error state;

incrementing means for incrementing an error counter for each identified slot; and

placing means, responsive to the error counter exceeding a threshold, for placing the slot into a permanently unavailable state.

25. A computer program product in a computer readable medium for isolating failing hardware in the data processing system, the computer program product comprising:

first instructions, responsive to detecting a recovery attempt from an error, for storing an indication of the attempt; and

second instructions, responsive to the error occurring in the more than a threshold for a hardware component, for placing the hardware component in an unavailable state.

34. A computer program product in a computer readable medium for handling errors, the computer program product comprising:

first instructions, responsive to an occurrence of an error, for determining whether the error is a recoverable error;

second instructions, responsive to a determination that the error is a recoverable error, for identifying slots on the bus indicating an error state;

third instructions for incrementing an error counter for each identified slot; and

fourth instructions, responsive to the error counter exceeding a threshold, for placing the slot into a permanently unavailable state.