Semiconductor device
First Claim
1. A semiconductor device comprising:
- a semiconductor layer;
a first dielectric film provided on said semiconductor layer;
a first gate electrode provided on said first dielectric film;
at least one second gate electrode provided opposite said first gate electrode to receive an input signal;
at least one second dielectric film intervening between said first gate electrode and at least one said second gate electrode;
a third gate electrode provided opposite said first gate electrode;
a ferroelectric film intervening between said first gate electrode and said third gate electrode; and
an output portion connected to a part of said semiconductor layer for outputting an output signal according to the input signal inputted in at least one said second gate electrode, wherein there is provided a learning ability for strengthening or weakening a correlation between said input signal and said output signal according to polarization characteristics of said ferroelectric film.
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Accused Products
Abstract
In an electric potential generating device, a source of an N type MIS transistor is mutually connected to that of a P type MIS transistor and also connected to an output terminal. A drain of an N type MIS transistor 54 is connected to a power supply voltage supply portion for supplying power supply voltage VDD, and a drain of the P type MIS transistor is connected to a ground. In addition, a substrate potential of the N type MIS transistor is a ground voltage VSS, and that of a P type MIS transistor 56 is the power supply voltage VDD. Thus, it is constituted as a source follower circuit for taking output out of the source. It is possible, by utilizing this electric potential generating device, to obtain a logic transformation circuit for stably switching between NOR operation and NAND operation.
22 Citations
41 Claims
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1. A semiconductor device comprising:
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a semiconductor layer;
a first dielectric film provided on said semiconductor layer;
a first gate electrode provided on said first dielectric film;
at least one second gate electrode provided opposite said first gate electrode to receive an input signal;
at least one second dielectric film intervening between said first gate electrode and at least one said second gate electrode;
a third gate electrode provided opposite said first gate electrode;
a ferroelectric film intervening between said first gate electrode and said third gate electrode; and
an output portion connected to a part of said semiconductor layer for outputting an output signal according to the input signal inputted in at least one said second gate electrode, wherein there is provided a learning ability for strengthening or weakening a correlation between said input signal and said output signal according to polarization characteristics of said ferroelectric film. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 16, 18, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
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14. A semiconductor device comprising:
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a semiconductor layer;
a first dielectric film provided on said semiconductor layer;
a first gate electrode provided on said first dielectric film;
a second gate electrode opposite said first gate electrode;
a ferroelectric capacitor having a lower electrode connected to said first gate electrode, an upper electrode connected to said second gate electrode, and a ferroelectric film intervening between said upper and lower electrodes;
a third gate electrode connected to the upper electrode of said ferroelectric capacitor;
at least one fourth gate electrode provided opposite said third gate electrode to receive the input signal;
at least one second dielectric film intervening between said third and fourth gate electrodes;
a fifth gate electrode provided opposite said third gate electrode to be supplied a polarization adjustment voltage of said ferroelectric film;
a third dielectric film intervening between said third and fifth gate electrodes; and
an output portion connected to a part of said semiconductor layer for outputting an output signal according to the input signal inputted to at least one said fourth electrode, wherein there is provided a learning ability for strengthening or weakening the correlation between said input signal and said output signal according to polarization characteristics of said ferroelectric film.
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17. A semiconductor device comprising:
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a semiconductor layer;
a first dielectric film provided on said semiconductor layer;
a first gate electrode provided on said first dielectric film;
a second gate electrode provided opposite said first gate electrode;
a third gate electrode provided opposite said second gate electrode;
at least one fourth gate electrode provided opposite said third gate electrode to receive the input signal;
at least one second dielectric film intervening between said third and fourth gate electrodes;
a fifth gate electrode provided opposite said third gate electrode;
a third dielectric film intervening between said third and fifth gate electrodes;
an output portion connected to a part of said semiconductor layer for outputting the output signal according to the input signal inputted to at least one said fourth electrode;
a ferroelectric capacitor having a lower electrode connected to said first gate electrode, an upper electrode connected to said second gate electrode, and a ferroelectric film intervening between said upper and lower electrodes;
a voltage supply portion for supplying a voltage for controlling polarization of said ferroelectric film to said fifth gate electrode, wherein the lower electrode of said ferroelectric capacitor is electrically connectable to one of said third and fifth gate electrodes, and the upper electrode of said ferroelectric capacitor is electrically connectable to one of said fifth gate electrode and said voltage supply portion.
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19. A semiconductor device comprising:
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a first semiconductor layer;
a first MISFET having a first dielectric film formed on said first semiconductor layer, a first gate electrode formed on said first gate dielectric film, first and second P type diffusion regions formed in the areas located at both sides of said first gate electrode in said first semiconductor layer;
a second semiconductor layer;
a second MISFET having a second dielectric film formed on said second semiconductor layer, a second gate electrode formed on said second gate dielectric film, first and second N type diffusion regions formed in the areas located at both sides of said second gate electrode in said second semiconductor layer;
a ferroelectric capacitor having a first electrode connected to said first and second gate electrodes in common, a second electrode opposite the first electrode, and a ferroelectric film intervening between said first and second electrodes;
a first voltage supply portion for supplying the first voltage to the first N type diffusion region of said second MISFET;
a first voltage supply portion for supplying the second voltage which is lower than said first voltage to the first P type diffusion region of said first MISFET; and
a voltage output portion connected in common to the second P type and N type diffusion regions of each of said MISFETs for outputting the output voltage according to the voltage inputted to said second electrode of said ferroelectric capacitor, and functioning as an electric potential generating device.
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32. A semiconductor device having a plurality of synapse portions for loading input signals and outputting output signals and a neuron portion for receiving the plurality of output signals from said plurality of synapse portions,
wherein said synapse portion comprises: -
a semiconductor layer;
a ferroelectric gate transistor having a gate dielectric film formed on said semiconductor layer, a gate electrode formed on said gate dielectric film, first and second diffusion regions formed in the areas located at both sides of said gate electrode in said semiconductor layer, a channel area intervening between the first and second diffusion regions, a first electrode connected to the gate electrode of MISFET, a second electrode opposite the first electrode, and the ferroelectric film intervening between said first and second electrodes;
an input portion electrically connected to said first diffusion region of said ferroelectric gate transistor for providing the input signals;
an output portion connected to said second diffusion region of said ferroelectric gate transistor for multiplying said input signal by a load coefficient and outputting it; and
a load signal input portion electrically connected to said second electrode of said ferroelectric capacitor to receive a load control signal. - View Dependent Claims (33, 34, 35, 36, 37, 38, 39, 40, 41)
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Specification