Power systems, power circuits, and components for power systems

• US 20020188383A1
• Filed: 05/21/2002
• Published: 12/12/2002
• Est. Priority Date: 05/21/2001
• Status: Active Grant

• Current Assignee: Vertiv Corporation (Vertiv Holdings Co.)
• Original Assignee: Emersub XCII, Inc.
• Inventors: Kammiller, Neil A., Felty, Jeffrey G., Knurek, Dennis F., Elek, Joseph F.
• Granted Patent: US 6,731,524 B2
• Time in Patent Office: Days
• US Class Current: 700/297
• CPC Class Codes: H02M 1/0012 Control circuits using digital or numerical techniques in DC/DC converters H02M3/157, H02M3/33515; in DC-AC converters H02M7/53873
• CPC Class Codes: H02M 1/007 Plural converter units in cascade push-pull DC/DC converters with pre-regulator H02M3/3374; DC-AC converters following a DC-DC stage including a high frequency transformer H02M7/4807; DC-AC converters following a DC-DC conversion stage generating periodically varying voltages H02M7/4826
• CPC Class Codes: H02M 1/0074 Plural converter units whose inputs are connected in series
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 1/34 Snubber circuits
• CPC Class Codes: H02M 1/346 Passive non-dissipative snubbers
• CPC Class Codes: H02M 1/4216 operating from a three-phase input voltage H02M1/4233 takes precedence
• CPC Class Codes: H02M 3/285 Single converters with a plurality of output stages connected in parallel parallel operation of a plurality of converters in dc distribution networks H02J1/10
• CPC Class Codes: H02M 3/3376 with automatic control of output voltage or current
• CPC Class Codes: H02M 7/003 Constructional details, e.g. physical layout, assembly, wiring or busbar connections
• CPC Class Codes: H02M 7/53878 by time shifting switching signals of one diagonal pair of the bridge with respect to the other diagonal pair
• CPC Class Codes: Y02B 70/10 Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

A power system includes a plurality of power supply units (“PSUs”), each PSU having an output that is coupled to the output of other PSUs in the power system. Each PSU includes a power factor correction (“PFC”) assembly for receiving an AC input and generating a first DC output. A DC/DC converter assembly is coupled to the PFC assembly, and receives the first DC output and generates a second regulated DC output. A control assembly is coupled to the DC/DC converter assembly, and is operative to monitor the DC/DC converter assembly output and in response thereto provide control signals to the DC/DC converter assembly.

Claims

1. A power system comprising a plurality of power supply units (“

PSUs”

), each PSU having an output that is coupled to the output of other PSUs in the power system, each PSU comprising;

a power factor correction (“

PFC”

) assembly for receiving an AC input and generating a first DC output;

a DC/DC converter assembly that is coupled to the PFC assembly, the DC/DC converter assembly receiving the first DC output and generating a second regulated DC output; and

a control assembly that is coupled to the DC/DC converter assembly, the control assembly being operative to monitor the DC/DC converter assembly output and in response thereto to provide control signals to the DC/DC converter assembly, the control assembly comprising,

a plurality of control assembly input circuits, the control assembly input circuits being operative to measure characteristics relating to the DC/DC converter assembly and operative to generate a measured characteristics output;

a signal processor having a signal path to the control assembly input circuits, the signal processor being operative to receive the measured characteristics output, perform computations wherein the measured characteristics output is used in the computations, and generate a signal processor output; and

a plurality of control assembly output circuits, the control assembly output circuits being operative to generate error signals based on the signal processor output.

2. The system according to claim 1 wherein:

the AC input comprises a three phase (“

3 Φ

”

) AC power source; and

the PFC assembly comprises a first, second, and third inrush limiting circuit, the first inrush limiting circuit being coupled to a first phase of the 3 Φ

AC power source, the second inrush limiting circuit being coupled to a second phase of the 3 Φ

AC power source, the third inrush limiting circuit being coupled to a third phase of the 3 Φ

AC power source.

3. The system according to claim 2 wherein the PFC assembly further comprises a first, second, and third PFC circuit, the first PFC circuit being coupled to an output of the first inrush limiting circuit, the second PFC circuit being coupled to an output of the second inrush limiting circuit, the third PFC circuit being coupled to an output of the third inrush limiting circuit.

4. The system according to claim 3 wherein:

the first DC output comprises a first PFC output from the first PFC circuit, a second PFC output from a second PFC circuit, and a third PFC output from a third PFC circuit; and

the DC/DC converter assembly comprises a first, second, and third DC/DC converter circuit, the first DC/DC converter circuit receiving the first PFC output, the second DC/DC converter circuit receiving the second PFC output, and the third DC/DC converter circuit receiving the third PFC output.

5. A power system comprising a plurality of power supply units (“

PSUs”

), each PSU having an output that is coupled to the output of other PSUs in the power system, each PSU comprising;

a power factor correction (“

PFC”

) assembly for receiving an AC input and generating a first DC output, the PFC comprising an inrush limiting circuit comprising;

a drive circuit operable to provide gate signals to an SCR bridge circuit, and a phase control circuit comprising a first phase generator operable to generate a first phase signal, a second phase generator operable to generate a second phase signal, the second phase signal periodically reset to an initial value, and a drive circuit actuator operable to place the drive circuit in a first activation state when a sum of the first and second phase signals exceed a threshold value, and further operable to place the drive circuit in a second activation state when the sum of the first and second phase signals is less than the threshold value; and

a DC/DC converter assembly that is coupled to the PFC assembly, the DC/DC converter assembly receiving the first DC output and generating a second regulated DC output; and

a control assembly that is coupled to the DC/DC converter assembly, the control assembly being operative to monitor the DC/DC converter assembly output and in response thereto to provide control signals to the DC/DC converter assembly.

6. The system according to claim 5 wherein:

the first phase generator comprises a first capacitor and a first current source coupled to the first capacitor, the first current source for providing a first current to the first capacitor;

the second phase generator comprises a second capacitor and a second current source coupled to the second capacitor, the second current source for providing a second current to the second capacitor; and

the drive circuit actuator comprises a first transistor have a gate, a drain and a source, the gate of the first transistor receiving the sum of the first ramp voltage signal and the second ramp voltage signal, the source of the first transistor connected to a reference voltage, and the drain of the first transistor coupled to the drive circuit.

7. The system according to claim 6 wherein the inrush limiting circuit further comprises a phase detector operable to detect a zero voltage crossing of an input voltage applied to the SCR bridge circuit and provide a reset signal to the phase control circuit to reset the second ramp voltage signal to the initial value upon detection of a zero voltage crossing.

8. The system according to claim 7 wherein the phase detector comprises:

a rectifier for receiving the input voltage signal and producing a rectified output voltage;

a voltage divider coupled to the rectifier and dividing the rectified output to a magnitude less than the input voltage;

a second transistor coupled to the rectifier, the second transistor driven by the rectified output voltage; and

a third capacitor coupled to the rectifier and the second transistor, the third capacitor charging when the second transistor is in an off state and discharging to provide the reset signal when the second transistor is in an on state;

a first zener diode coupled in parallel to the third capacitor and coupled in series between the voltage divider and a source of the second transistor, and a second zener diode interposed between a gate and the source of the second transistor; and

a phototransistor connected to the third capacitor whereby the phototransistor is in an on state when the third capacitor is discharging;

wherein the phase detector is powered by the by the rectified output voltage.

9. A power system comprising a plurality of power supply units (“

PSUs”

), each PSU having an output that is coupled to the output of other PSUs in the power system, each PSU comprising;

a power factor correction (“

PFC”

) assembly for receiving an AC input and generating a first DC output, the PFC comprising;

a power circuit comprising first and second input capacitors forming a bank node, first and second inductors, the first and second inductors inductively coupled, the first inductor connected to the first input capacitor and the second inductor connected to the second input capacitor, first and second switches, the first switch connected to the first inductor and the bank node, the second switch connected to the second inductor and the bank node, and an output circuit connected to the first and second inductors and the bank node, the output circuit operable to produce an output voltage;

a control circuit operable to monitor the output voltage and produce a switch signal at a switching frequency; and

a drive circuit coupled to the control circuit and the first and second switches, the drive circuit operable to operate the first and second switches based on the switch signal.

a DC/DC converter assembly that is coupled to the PFC assembly, the DC/DC converter assembly receiving the first DC output and generating a second regulated DC output; and

a control assembly that is coupled to the DC/DC converter assembly, the control assembly being operative to monitor the DC/DC converter assembly output and in response thereto to provide control signals to the DC/DC converter assembly.

10. The system according to claim 9 wherein the drive circuit and control circuit are connected to a flying node, the flying node at a common voltage at the switching frequency.

11. The system according to claim 10 wherein:

the control circuit comprises a difference amplifier connected to the output circuit to measure an output circuit voltage, the difference amplifier rejecting the common voltage at the switching frequency and producing an output voltage based on the output circuit voltage; and

the drive circuit comprises a first drive circuit providing a first drive signal for the first switch, the first drive signal referenced to the bank node; and

a second drive circuit providing a second drive signal for the second switch, the second drive signal referenced to the flying node.

12. The system according to claim 11 wherein the first and second input capacitors are matched capacitors, and wherein the input power signal is substantially divided across the first and second input capacitors.

13. The system according to claim 9 wherein the PFC circuit further comprises an inductive coupler, the inductive coupler comprising:

a first coil defining a first top periphery, a first outer periphery, and a first bottom periphery;

a second coil defining a second top periphery, a second outer periphery, and a second bottom periphery; and

a coupling element forming a conductive loop around the first and second top, outer and bottom peripheries.

14. The system according to claim 13 wherein the coupling element comprises a metal member extending around the first and second outer peripheries of the first and second coils.

15. The system according to claim 13 wherein the inductive coupler further comprises a core, and wherein the first and second coils are disposed on the core.

16. The system according to claim 15 wherein the coupling element comprises a ceramic ferrite.

17. The system according to claim 15 wherein the coupling element comprises a plurality of metal bands.

18. The system according to claim 15 wherein the coupling element comprises a plurality of wire conductors.

20. The system according to claim 19 wherein the DC/DC converter further comprises:

a third inductor connected to the secondary node;

a first bridge capacitor connected in parallel with the first bridge; and

a second bridge capacitor coupled in parallel with the second bridge.

21. The system according to claim 19 wherein the first inductor is interposed between the first terminal of the first primary winding and the first bridge, and the second inductor is interposed between the first terminal of the second primary winding and the second bridge.

22. The system according to claim 19 wherein the first inductor is connected to the first terminal of the first secondary winding and the second inductor is connected to the second terminal of the second secondary winding.

24. The system according to claim 23 wherein the control assembly comprises:

a plurality of control assembly input circuits, the control assembly input circuits being operative to measure characteristics relating to each of the power trains and operative to generate a measured characteristics output;

a signal processor having a signal path to the control assembly input circuits, the signal processor being operative to receive the measured characteristics output, perform computations wherein the measured characteristics output is used in the computations, and generate a signal processor output; and

a plurality of control assembly output circuits, the control assembly output circuits being operative to generate error signals based on the signal processor output.

25. The system according to claim 24 wherein the signal processor comprises a digital signal processor.

26. The system according to claim 24 wherein each DC/DC converter circuit further comprises a control circuit, the control circuit in response to the error signals generated by the control assembly output circuits being operative to generate control signals to drive switches in the DC/DC converter circuit.

27. The system according to claim 26 wherein the error signals comprise a common error signal and a first, second, and third specific error signal, the common error signal being provided to each control circuit, the first specific error signal being provided to the first power train'"'"'s control circuit, the second specific error signal being provided to the second power train'"'"'s control circuit, and the third specific error signal being provided to the third power train'"'"'s control circuit.

28. The system according to claim 24 wherein the control assembly is operative to generate error signals that cause each power train to supply an equal amount of the total output current supplied by the PSU.

29. The system according to claim 24 wherein the control assembly further comprises a plurality of algorithms that are executed by the signal processor, one of the algorithms being a current balance algorithm, the current balance algorithm being operative to cause the control assembly to generate error signals that cause each power train to supply an equal amount of the total output current supplied by the PSU.

30. The system according to claim 24 wherein the control assembly further comprises a plurality of algorithms that are executed by the signal processor, one of the algorithms being a brown-out/black-out control algorithm, the brown-out/black-out control algorithm being operative to cause the control assembly to generate error signals that allow the PSU to operate at a reduced output current level when the voltage level of the AC input is below a nominal voltage range.

31. The system according to claim 24 wherein the control assembly further comprises a plurality of algorithms that are executed by the signal processor, one of the algorithms being an extended recharge capability control algorithm, the extended recharge capability control algorithm being operative to cause the control assembly to generate error signals that allow the PSU to supply output current beyond a nominal output current rating level if an environmental condition is met.

32. The system according to claim 24 wherein the control assembly further comprises a plurality of algorithms that are executed by the signal processor, one of the algorithms being a voltage loop control algorithm , the voltage loop control algorithm being operative to cause the control assembly to generate error signals that reduces closed loop instability in a rectifier.

19. A power system comprising a plurality of power supply units (“

PSUs”

), each PSU having an output that is coupled to the output of other PSUs in the power system, each PSU comprising;

a power factor correction (“

PFC”

) assembly for receiving an AC input and generating a first DC output;

a DC/DC converter assembly that is coupled to the PFC assembly, the DC/DC converter assembly receiving the first DC output and generating a second regulated DC output, the DC/DC converter comprising;

first and second bridges, each first and second bridge comprising a plurality of switch elements;

a plurality of coupling capacitors, each coupling capacitor coupling one of the switch elements of the first bridge to one of the switch elements of the second bridge;

a transformer comprising a first primary winding, a second primary winding, a first secondary winding, and a second secondary winding, each of the windings defining first and second terminals, the first primary winding connected to the first bridge, and the second primary winding connected to the second bridge, the second terminal of the first secondary winding connected to the first terminal of the second secondary winding to form a secondary node; and

a coupled inductor comprising first and second inductors, the coupled inductor connected to the transformer so that the first and second primary windings are inductively coupled through the coupled inductor; and

a control assembly that is coupled to the DC/DC converter assembly, the control assembly being operative to monitor the DC/DC converter assembly output and in response thereto to provide control signals to the DC/DC converter assembly.

23. A power system comprising a plurality of power supply units (“

PSUs”

), each PSU having an output that is coupled to the output of other PSUs in the power system, each PSU comprising;

a first, second, and third power train, each power train comprising a power factor correction (“

PFC”

) circuit that receives an AC input and generates a first DC output and a DC/DC converter circuit that receives the first DC output and generates a second regulated DC output; and

a control assembly that is coupled to the first, second, and third power trains, the control assembly being operative to monitor outputs supplied by the first, second, and third power trains and in response thereto being operative to provide control signals to each of the first, second, and third power trains.