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Method and system for high-speed processing IPSec security protocol packets

  • US 20020188839A1
  • Filed: 06/13/2001
  • Published: 12/12/2002
  • Est. Priority Date: 06/12/2001
  • Status: Active Grant
First Claim
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1. A security data packet processing system comprising:

  • a transmitting (Tx) direct memory access (DMA) interface (314) receiving a streamed security data packet, selecting a channel for processing the streamed security data packet and transferring the streamed security data packet to an external memory;

    an input DMA engine (306) retrieving portions of the streamed security data packet from the external memory after all portions of the streamed security data packet have been transferred to the external memory;

    an input FIFO (308) receiving the portions of the streamed security data packet from the input DMA engine (306) in blocks of a predetermined byte size, portions being retained in a portion of the input FIFO allocated to the selected channel;

    a context RAM (308) receiving a security association database (SAD) entry associated with the selected channel, the SAD entry being retrieved from the external memory by the input DMA engine; and

    an input crypto DMA engine (310) providing the blocks of the security data packet to a processing engine for processing.

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