Method for sorting integrated circuit devices

• US 20020189981A1
• Filed: 08/13/2002
• Published: 12/19/2002
• Est. Priority Date: 01/17/1997
• Status: Active Grant

• Current Assignee: Raymond J. Beffa
• Original Assignee: Raymond J. Beffa
• Inventors: Beffa, Raymond J.
• Granted Patent: US 7,368,678 B2
• Time in Patent Office: Days
• US Class Current: 209/573
• CPC Class Codes: B07C 5/3412 according to a code applied to the object which indicates a property of the object, e.g. quality class, contents or incorrect indication sorting according to size measured by light-responsive means B07C5/10; sorting according to optical properties B07C5/342; for packages B65D79/02; for information carriers G06K7/00
• CPC Class Codes: B07C 5/344 according to electric or electromagnetic properties sorting according to size measured electrically or electronically B07C5/08; material testing by magnetic means G01N24/00, G01N27/00, by electrical means G01N27/00; electrical measuring devices in general G01R; coin testing G07D5/00
• CPC Class Codes: G01R 31/2851 Testing of integrated circuits [IC] G01R31/317 takes precedence; testing individual devices G01R31/26; testing printed circuits G01R31/2801
• CPC Class Codes: H01L 2223/5444 for electrical read out
• CPC Class Codes: H01L 2223/54473 for use after dicing

Abstract

A method for sorting integrated circuit (IC) devices of the type having a substantially unique identification (ID) code, such as a fuse ID, includes automatically reading the ID code of each of the IC devices and sorting the IC devices in accordance with their automatically read ID codes.

Claims

1. A method in an integrated circuit process for determining at least one integrated circuit device in need of enhanced reliability testing from at least one group of integrated circuit devices undergoing test procedures, the integrated circuit devices each having a substantially unique identification code, the method comprising:

storing an enhanced reliability testing flag in connection with the identification code of each integrated circuit device of the integrated circuit devices in the at least one group indicating whether each integrated circuit device requires said enhanced reliability testing;

automatically reading the identification code of each integrated circuit device of the integrated circuit devices in the at least one group;

accessing the enhanced reliability testing flag stored in connection with each of the automatically read identification codes of each integrated circuit device of said integrated circuit devices in said group having the identification code thereof read;

sorting the integrated circuit devices in accordance with said enhanced reliability testing flag indicating the integrated circuit devices are in need of said enhanced reliability testing; and

performing testing of integrated circuit devices only in need of said enhanced reliability testing.

2. A method in an integrated circuit process for separating integrated circuit devices on one or more semiconductor wafers to determine any additional enhanced reliability testing from a group of integrated circuit devices undergoing test procedures, the integrated circuit devices each having a substantially unique identification code, the method comprising:

storing an enhanced reliability testing flag in connection with the identification code of each integrated circuit device of the integrated circuit devices in at least one group indicating whether each integrated circuit device requires said enhanced reliability testing;

automatically reading the identification code of each integrated circuit device of the integrated circuit devices in the at least one group;

accessing the enhanced reliability testing flag stored in connection with each of the automatically read identification codes of each integrated circuit device of said integrated circuit devices in said at least one group having the identification code thereof read;

sorting the integrated circuit devices in accordance with whether their said enhanced reliability testing flag indicating the integrated circuit device comes from a semiconductor wafer which is known as an unreliable semiconductor wafer; and

performing testing only of integrated circuit devices in need of said enhanced reliability testing.