Tuner circuit

• US 20020191119A1
• Filed: 08/13/2002
• Published: 12/19/2002
• Est. Priority Date: 09/05/1998
• Status: Active Grant

• Current Assignee: Chul-Min Kim
• Original Assignee: Chul-Min Kim
• Inventors: Kim, Chul-min
• Granted Patent: US 8,520,148 B2
• Time in Patent Office: Days
• US Class Current: 348/731
• CPC Class Codes: H04N 5/4446 IF amplifier circuits specially adapted for B&W TV RF amplifiers in general H03F3/189
• CPC Class Codes: H04N 5/60 for the sound signals
• CPC Class Codes: H04N 5/7755 the recorder being connected to, or coupled with, the antenna of the television receiver
• CPC Class Codes: H04N 9/64 Circuits for processing colour signals H04N9/77 takes precedence; camera processing pipelines for processing colour signals H04N23/84

Abstract

A tuner circuit and a method of designing a tuner circuit for removing a buffer circuit for video drive for increasing drive current capacitance added to an output terminal is provided, unlike a buffer for small-current drive installed in a tuner circuit. The method of designing a tuner circuit has a buffer installed in an integrated circuit (IC) of small-current drive in a video output terminal, and includes an RF converting portion, a tuning portion and a demodulation portion, in which a video output signal of the buffer in IC is input to an input circuit for processing a signal without an external buffer for drive, and the amount of attenuation of a signal at high frequency due to small drive current is measured to improve a frequency characteristic of a video signal in the tuner circuit in proportion to the amount of attenuation. Thus, an additional buffer for drive is not required, so that the number of devices is reduced, to thereby lower the material costs.

Claims

1. A method of designing a tuning circuit, comprising installing a buffer within an integrated circuit exhibiting a small amplitude drive current at a video output terminal, the tuning circuit having an RF converter, a tuner and a demodulation stage, wherein a video output signal of the buffer is input to an input circuit for processing a signal without an external buffer for drive, and the amount of attenuation of a high frequency of a signal due to small drive current is measured to improve the frequency characteristic of a video signal in the tuner circuit in proportion to the amount of attenuation.

2. The method of claim 1, wherein the input circuit for processing a signal is a tuner/jack input selection switch, and the input impedance of the tuner/jack input selection switch is at least 30K(Ω

) or more.

3. The method of claim 1, wherein the tuning circuit is designed to boost high frequencies near a color frequency f_c of the SAW filter in the demodulation portion to improve frequency characteristic of a video signal.

4. The method of claim 1, wherein the tuning circuit is designed to adjust the attenuation and the sharpness (Q) of the sound trap (SIF TRAP) in the demodulation portion.

5. A tuner circuit comprised of an integrated circuit, said integrated circuit comprising:

means for providing a received radio frequency (RF) video signal to a tuning circuit and to a television;

said tuning circuit converting said received radio frequency (RF) video signal to an intermediate frequency (IF) video signal of a predetermined channel frequency;

a demodulator for demodulating the IF video signal and separating an audio signal from the demodulated video signal; and

a buffer having a small drive current for providing the separated demodulated video signal output from said demodulator to a video signal level adjustor for adjusting the level of the separated demodulated video signal.

6. The tuner circuit as set forth in claim 5, said means for providing a received radio frequency (RF) video signal to a tuning circuit and to a television comprising:

a distributor and a TV/VCR switch, wherein said distributer provides said RF video signal to said TV/VCR switch and to said tuning circuit, and said TV/VCR switch provides said RF video signal to said television in a television mode.

7. The tuner circuit as set forth in claim 5, said tuner circuit comprising:

an amplifier for outputting an amplified RF video signal by amplifying said RF video signal provided to said tuner circuit;

a mixer for mixing the amplified RF video signal with a local oscillation signal a demodulation portion to convert the amplified RF video signal to said IF video signal of said predetermined channel frequency; and

a SAW filter for filtering the frequency characteristics of said IF video signal and providing a filtered IF video signal to said demodulator.

8. The tuner circuit as set forth in claim 5, said demodulator comprising:

a sound trap for separating said audio signal from said IF video signal to improve the characteristics of said separated demodulated video signal at a high frequency.

9. The tuner circuit as set forth in claim 8, said sound trap comprising:

a resistor connected in series with a variable inductor and a ceramic filter coupled in parallel with said variable inductor.

10. The tuner circuit as set forth in claim 5, said video signal level adjustor comprising:

a first resistor coupled between said buffer and a node; and

a second resistor coupled between said node and a ground terminal.

11. The tuner circuit as set forth in claim 6, said video signal level adjustor comprising:

a first resistor coupled between said buffer and a node; and

a second resistor coupled between said node and a ground terminal.

12. The tuner circuit as set forth in claim 11, further comprising:

a selection switch having a first input terminal connected to said node, a second input terminal connected to receive a jack video input signal and an output terminal;

a video signal processor of a video cassette recorder connected to the output terminal of said selection switch; and

a modulator for receiving said separated audio signal and an output of said video signal processor, said modulator modulating the output of said video signal processor to a predetermined channel for output to said TV/VCR switch for output to said television.

13. The tuner circuit as set forth in claim 12, wherein said selection switch is a tuner/jack input selection switch, and the input impedance of the tuner/jack input selection switch is at least 30K(Ω

).