Evaluation device for assessing a digital data signal, in particular a data signal for a semiconductor memory circuit

• US 20020196868A1
• Filed: 06/24/2002
• Published: 12/26/2002
• Est. Priority Date: 06/23/2001
• Status: Abandoned Application

• Current Assignee: Andre Schaefer, Hermann Ruckerbauer
• Original Assignee: Andre Schaefer, Hermann Ruckerbauer
• Inventors: Schaefer, Andre, Ruckerbauer, Hermann
• Application Number:
  US10/178,694
• Publication Number:
  US 20020196868A1
• Time in Patent Office: Days
• US Class Current: 375/316
• CPC Class Codes: G11C 27/02 Sample-and-hold arrangements G11C27/04 takes precedence

Abstract

The invention relates to an evaluation device for assessing a digital data signal having a sampling device, a processing unit and a data memory. The sampling device is configured to sample the data signal multiply in a temporally offset manner within a predetermined time period and to store the samples of the data signal in the data memory. The processing unit is configured to output a data value of the data signal in a manner dependent on the samples at an output of the evaluation device.

Claims

1. An evaluation device for assessing a digital data signal, comprising:

a sampling device;

a processing unit;

a data memory, and

an output;

said sampling device being configured to obtain samples by sampling the data signal a plurality of times in a temporally offset manner within a predetermined time period;

said sampling device storing the samples in said data memory; and

said processing unit being configured to provide, at said output, a data value of the data signal in a manner dependent on the samples.

2. The evaluation device according to claim 1, wherein:

said sampling unit includes a plurality of sampling devices that are configured with respect to one another so as to receive the data signal in a temporally offset manner.

3. The evaluation device according to claim 1, wherein:

the predetermined time period is not greater than a maximum time range required for transmitting a datum.

4. The evaluation device according to claim 1, wherein:

a sample that is stored most often in said data memory is output by said processing unit as the data value.

5. The evaluation device according to claim 1, wherein:

said sampling device uses a validity signal to start the sampling of the data signal in the temporally offset manner.

6. The evaluation device according to claim 5, wherein:

said processing unit uses the samples stored in said data memory to determine a temporal offset of the data signal relative to the validity signal.

7. The evaluation device according to claim 1, wherein:

the digital data signal is for a semiconductor memory circuit.

8. A method for assessing a digital data signal, which comprises:

sampling the data signal a plurality of times in a temporally offset manner within a predetermined time period;

storing the samples;

determining a data value in a manner dependent on the samples that are stored; and

outputting a data value that is assigned to a datum of the data signal.

9. The method according to claim 8, which comprises:

performing the step of determining the data value by allocating a value of a most frequent sample to the data value.

10. The method according to claim 8, wherein:

the predetermined time period is not greater than a maximum time range in which a datum of the data signal is transmitted.

11. The method according to claim 8, which comprises:

using a validity signal to start performance of the sampling of the data signal.

12. The method according to claim 8, wherein:

the data signal is for a semiconductor memory circuit.