Method of making a compound, high-K, gate and capacitor insulator layer

• US 20020197790A1
• Filed: 05/30/2002
• Published: 12/26/2002
• Est. Priority Date: 12/22/1997
• Status: Abandoned Application

• Current Assignee: Isik C. Kizilyalli, Pradip K. Roy, Yi Ma
• Original Assignee: Isik C. Kizilyalli, Pradip K. Roy, Yi Ma
• Inventors: Kizilyalli, Isik C., Ma, Yi, Roy, Pradip Kumar
• Application Number:
  US10/158,467
• Publication Number:
  US 20020197790A1
• Time in Patent Office: Days
• US Class Current: 438/240
• CPC Class Codes: H01L 28/56 the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers

Abstract

A method of making a gate or capacitor insulator structure using a first grown oxide layer, depositing a high-k dielectric material on the grown oxide layer, and then depositing an oxide layer. The deposited oxide layer is then preferably densified in an oxidizing atmosphere. A conducting layer, such as a gate or capacitor plate, may be then formed on the densified oxide layer.

Claims

1. A method of making an integrated circuit having an oxidizable layer with a surface, comprising the steps of:

growing an oxide layer on the oxidizable surface;

depositing a high-k dielectric layer on the grown oxide layer; and

depositing an oxide layer on the high-k dielectric layer.

2. The method as recited in claim 1, further comprising the step of:

densifying the deposited oxide in an oxidizing atmosphere.

3. The method as recited in claim 2, wherein the high-k dielectric layer is selected from the group of Ta₂O₅, TiO₂, and perovskite materials.

4. The method as recited in claim 2, wherein the perovskite material is of the form MTiO₃, where M is selected from the group of Sr, Ba, La, Ti, Pb, Ba_xSr_1-x and Pb_xLa_1-x.

5. The method as recited in claim 2, wherein the oxide layers are oxides of silicon.

6. The method as recited in claim 5, wherein oxidizable layer is a silicon substrate.

7. The method as recited in claim 5, wherein oxidizable layer is a polysilicon layer.

8. The method as recited in claim 5, wherein the grown oxide layer is grown in a dry oxidizing atmosphere.

9. The method as recited in claim 5, wherein the deposited oxide layer is deposited in a LPCVD reactor.

10. The method as recited in claim 9, wherein the LPCVD reactor uses tetraethylorthosilicate (TEOS) as a silicon source gas.

11. The method as recited in claim 9, wherein the LPCVD reactor uses silane as a silicon source gas.

12. The method as recited in claim 5, further comprising the step of depositing a conductive layer on the deposited oxide layer.

14. The method as recited in claim 13, wherein the high-k dielectric layer is selected from the group of Ta₂O₅, TiO₂, and perovskite materials.

15. The method as recited in claim 14, wherein the perovskite material is of the form MTiO₃, where M is selected from the group of Sr, Ba, La, Ti, Pb, Ba_xSr_1-x and Pb_xLa_1-x.

16. The method as recited in claim 13, wherein the grown oxide layer is grown in a dry oxidizing atmosphere.

17. The method as recited in claim 16, wherein the deposited oxide layer is deposited in a LPCVD reactor.

18. The method as recited in claim 17, wherein the LPCVD reactor uses tetraethylorthosilicate (TEOS) as a silicon source gas.

19. The method as recited in claim 17, wherein the LPCVD reactor uses silane as a silicon source gas.

13. A method of making an integrated circuit having a silicon substrate with a surface, comprising the steps of:

growing a silicon dioxide layer on the substrate surface;

depositing a high-k dielectric layer on the grown silicon dioxide layer;

depositing a silicon dioxide layer on the high-k dielectric layer; and

densifying the deposited oxide in an oxidizing atmosphere.