Electrooptic device and electronic apparatus

• US 20030011552A1
• Filed: 06/27/2002
• Published: 01/16/2003
• Est. Priority Date: 07/13/2001
• Status: Active Grant

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Ishii, Ryo, Yamazaki, Suguru
• Granted Patent: US 6,940,482 B2
• Time in Patent Office: Days
• US Class Current: 345/89
• CPC Class Codes: G09G 2300/0828 forming a digital to analog [D/A] conversion circuit
• CPC Class Codes: G09G 2300/0857 Static memory circuit, e.g. flip-flop
• CPC Class Codes: G09G 2320/0266 Reduction of sub-frame artefacts
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/2022 using sub-frames
• CPC Class Codes: G09G 3/3659 the addressing of the pixel involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependant on signal of two data electrodes

Abstract

To simplify the configuration of a comparator circuit used in an electrooptic device or the like, in which gradation data is stored for each pixel, to realize lower power consumption, higher definition and multiple gradation. Transistors 31 to 33 in which gradation data D0 to D2 are respectively supplied to the gate terminals, and transistors 41 to 43 in which gradation signals P0 to P2 resulting from counting are respectively supplied to the gate terminals are connected as shown in the drawings to form a comparator circuit 30. When the gradation signals P0 to P2 are less than the results of reversal of the gradation data D0 to D2, the comparator circuit 30 is put into a nonconductive state, while when the gradation signals P0 to P2 are equal to the results of reversal of the gradation data D0 to D2, the comparator circuit 30 is put into a conductive state. As a result, a pulse signal PW can be produced according to the gradation data D0 to D2 to realize a gradation display in a sub-field driving system. Also, the number of the transistors constituting the comparator circuit 30 can be significantly decreased, as compared with a conventional technique.

Claims

1. An electrooptic device comprising:

a plurality of pixels for performing a gradation display according to the level of a supplied driving signal;

a pixel electrode provided for each of the pixels;

a memory for storing n-bit (n is a natural number of 2 or more) gradation data of each of the pixels;

a pulse width modulation circuit comprising a comparator circuit for comparing the gradation data stored in the memory and n-bit gradation signals, and a latch circuit to output a driving signal from the latch circuit; and

a switching circuit for applying either a voltage for turning on each of the pixels or a voltage for turning off each of the pixels to the pixel electrode according to the driving signal level.

2. An electrooptic device according to claim 1, wherein the comparator circuit comprises:

n first switching elements respectively switched according to the n-bit gradation data and connected in series between first and second terminals; and

n second switching elements respectively switched according to the n-bit gradation signals successively updated and respectively connected in parallel to the n first switching elements;

wherein the conductive/nonconductive state between the first and second terminals is controlled according to the gradation data and the gradation signals, and the results of comparison between the gradation data and the gradation signals are output to the latch circuit.

3. An electrooptic device according to any one of claims 1 and 2, wherein the pulse-width modulation circuit comprises:

the comparator circuit; and

the latch circuit which is set to a first state when a first signal is input, and to a second state when a second signal is input, and to which the first signal is input when the comparator circuit is in the conductive state;

wherein the second signal is input to the latch circuit within a predetermined reset period, the count results obtained by counting up or counting down several times without the reset period are supplied as the gradation signals to the comparator circuit; and

the conductive/nonconductive state between the first and second terminals of the comparator circuit is controlled according to the result of comparison between the gradation data and the gradation signals to set the ratio of the time required for the latch circuit to maintain the first state to the time required for the latch circuit to maintain the second state without the reset period.

4. An electrooptic device according to anyone of claims 1 to 3, wherein the pulse-width modulation circuit further comprises:

a third switching element for supplying the second signal to the latch circuit in a conductive state; and

a fourth switching element for supplying the first signal to the comparator circuit in a conductive state;

wherein the third switching element is set to the conductive state when the predetermined reset signal is in a reset command state, and the fourth switching element is set to the conductive state when the reset signal is in a non-reset command state.

5. An electrooptic device according to any one of claims 1 to 4, further comprising a signal generating circuit for setting the reset signal to the reset command state at the beginning of the reset period, and then setting the reset signal to the non-reset command state and outputting the count results obtained by counting up or counting down several times as the gradation signals.

6. An electrooptic device according to any one of claims 1 to 5, wherein each of the pixels comprises the pixel electrode, the memory, the pulse-width modulation circuit, and the switching circuit, the pixels being formed on an element substrate comprising a transparent substrate and a semiconductor thin film deposited thereon.

7. An electrooptic device according to any one of claims 1 to 5, wherein each of the pixels comprises the pixel electrode, the memory, the pulse-width modulation circuit, and the switching circuit, the pixels being formed on a single crystal silicon substrate.

8. An electrooptic device according to claim 7, wherein the single crystal silicon substrate is a SOI substrate comprising an insulating substrate and a single crystal silicon layer formed thereon.

9. An electrooptic device according to any one of claims 1 to 8, wherein the memory, the pulse-width modulation circuit, and the switching circuit are provided opposite to the observation side with respect to the pixel electrode.

10. An electrooptic device according to any one of claims 1 to 9 further comprising:

an element substrate on which the pixels are formed;

a counter substrate provided with a counter electrode to which a predetermined reference voltage is applied; and

a liquid crystal sandwiched between the element substrate and the counter substrate.

11. An electronic apparatus comprising an electrooptic device according to any one of claims 1 to 10.