Cam reference for inspection of multi-color and contour images

• US 20030011761A1
• Filed: 06/24/2002
• Published: 01/16/2003
• Est. Priority Date: 12/23/1999
• Status: Active Grant

• Current Assignee: Orbotech Limited (KLA Corporation)
• Original Assignee: Orbotech Limited (KLA Corporation)
• Inventors: Gutman, Zeev, Gilat-Bernshtein, Tally
• Granted Patent: US 7,218,771 B2
• Time in Patent Office: Days
• US Class Current: 356/237.4
• CPC Class Codes: G01N 2021/95615 with stored comparision signal
• CPC Class Codes: G01N 2021/95638 for PCB's
• CPC Class Codes: G01N 21/95607 using a comparative method
• CPC Class Codes: G01N 21/95684 Patterns showing highly reflecting parts, e.g. metallic elements
• CPC Class Codes: G01R 31/311 of integrated circuits G01R31/31728 takes precedence
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/0006 using a design-rule based approach

Abstract

This invention discloses an electrical circuit inspection system including an optical subsystem for optically inspecting an electrical circuit and providing an inspection output identifying more than two different types of regions and an analysis subsystem for analyzing the inspection output, the analyzing including comparing the inspection output with a computer file reference identifying more than two different types of regions. A method for inspecting an electrical circuit inspection is also disclosed.

Claims

1. An electrical circuit inspection system comprising:

an optical subsystem for optically inspecting an electrical circuit and providing an inspection output identifying more than two different types of regions; and

an analysis subsystem for analyzing said inspection output, said analyzing including comparing said inspection output with a computer file reference identifying more than two different types of regions.

2. An electrical circuit inspection system according to claim 1 and wherein said optical subsystem is capable of optically inspecting more than one layer of an electrical circuit and said more than two different types of regions include regions at more than one layer of said electrical circuit.

3. An electrical circuit inspection system according to claim 1 or claim 2 and wherein said more than two different types of regions include an exposed metal region, a metal region covered by a translucent material, an exposed substrate and a substrate covered by said translucent material.

4. An electrical circuit inspection system according to claim 3 and wherein said translucent material is a solder mask.

5. An electrical circuit inspection system according to claim 3 and wherein said translucent material is a polyamide layer.

6. An electrical circuit inspection system according to claim 1 or claim 2 and wherein said more than two different types of regions include an exposed first metal region, a first metal region covered by a translucent material, an exposed second metal region, a second metal region covered by a translucent material, an exposed substrate and a substrate covered by said translucent material.

7. An electrical circuit inspection system according to claim 6 and wherein said translucent material is a solder mask.

8. An electrical circuit inspection system according to claim 6 and wherein said translucent material is a polyamide layer.

9. An electrical circuit inspection system according to any of the preceding claims and wherein said computer file reference identifying more than two different types of regions comprises a composite of multiple computer files, each representing a different layer of said electrical circuit.

10. An electrical circuit inspection system according to any of the preceding claims and wherein said computer file reference identifying more than two different types of regions comprises an overlay of multiple computer files, each representing a different layer of said electrical circuit.

11. An electrical circuit inspection system according to any of the preceding claims and wherein said computer file reference identifying more than two different types of regions comprises multiple computer files, each representing a different layer of said electrical circuit, superimposed in mutual registration.

12. An electrical circuit inspection system according to any of the preceding claims and wherein said computer file reference comprises a computer file of at least one metal layer and at least one layer of a translucent material overlying said at least one metal layer, superimposed in mutual registration.

13. An electrical circuit inspection system according to any of the preceding claims and wherein said computer file reference is a polychromatic reference.

14. An electrical circuit inspection system according to any of the preceding claims and wherein said inspection output is a polychromatic output.

15. An electrical circuit inspection system according to any of the preceding claims and wherein said computer file reference comprises at least one CAM file.

17. Apparatus according to claim 16 and wherein the different types of regions are optically distinguishable.

19. Apparatus for constructing a computer file reference identifying more than two different types of regions on an electrical circuit according to claim 16 and wherein said more than two different types of regions include an exposed metal region, a metal region covered by a translucent material, an exposed substrate and a substrate covered by said translucent material.

20. Apparatus for constructing a computer file reference according to claim 19 and wherein said translucent material is a solder mask.

21. Apparatus for constructing a computer file reference according to claim 19 and wherein said translucent material is a polyamide layer.

22. Apparatus for constructing a computer file reference according to claim 16 or claim 19 and wherein said more than two different types of regions include an exposed first metal region, a first metal region covered by a translucent material, an exposed second metal region, a second metal region covered by a translucent material, an exposed substrate and a substrate covered by said translucent material.

23. Apparatus for constructing a computer file reference according to claim 22 and wherein said translucent material is a solder mask.

24. Apparatus for constructing a computer file reference according to claim 22 and wherein said translucent material is a polyamide layer.

16. Apparatus for constructing a computer file reference identifying more than two different types of regions on an electrical circuit comprising a superimposer for superimposing in mutual registration at least two computer files, each representing a different portion of said electrical circuit.

18. Apparatus according to either of claims 16 and 17 and wherein the portion is a layer of the electrical circuit, and a plurality of layers form an inspectable surface of the electrical circuit.

25. Apparatus for constructing a computer file reference according to any of the preceding claims 16-24 and wherein said computer file reference identifying more than two different types of regions comprises a composite of multiple computer files, each representing a different layer of said electrical circuit.

26. Apparatus for constructing a computer file reference according to any of the preceding claims 16-25 and wherein said computer file reference identifying more than two different types of regions comprises an overlay of multiple computer files, each representing a different layer of said electrical circuit.

27. Apparatus for constructing a computer file reference according to any of the preceding claims 16-26 and wherein said computer file reference identifying more than two different types of regions comprises multiple computer files, each representing a different layer of said electrical circuit, superimposed in mutual registration.

28. Apparatus for constructing a computer file reference according to any of the preceding claims 16-27 and wherein said computer file reference comprises a computer file of at least one metal layer and at least one layer of a translucent material overlying said at least one metal layer, superimposed in mutual registration.

29. Apparatus for constructing a computer file reference according to any of claims 16-28 and wherein said computer file reference comprises at least one CAM file.

30. A computer file reference useful in an electrical circuit inspection system and comprising at least one computer originated computer file representing more than two different types of regions in said electrical circuit

31. A computer file reference according to claim 30 and wherein the types of regions are optically distinguishable.

32. A computer file reference according to claim 30 and comprising at least one computer originated computer file representing more than two different types of regions in said electrical circuit, wherein each region is one of a material forming part of an electrical circuit, a composite of at least two materials forming an electrical circuit.

33. A computer file reference according to claim 30 and wherein said at least one computer file comprises a combination of multiple computer files, each representing a different layer of an electrical circuit, said reference identifying more than two different types of regions.

34. A computer file reference according to claim 30 and wherein said at least one computer file is derived from multiple computer files, each representing a different layer of an electrical circuit, said reference identifying more than two different types of regions.

35. A computer file reference according to claim 30 and wherein said reference comprises an overlay of multiple computer files, each representing a different layer of said electrical circuit.

36. A computer file reference according to any of the preceding claims 30-35 and wherein said computer file reference identifying more than two different types of regions comprises multiple computer files, each representing a different layer of said electrical circuit, superimposed in mutual registration.

37. A computer file reference according to any of the preceding claims 30-36 and comprising a computer file of at least one metal layer and at least one layer of a translucent material overlying said at least one metal layer, superimposed in mutual registration.

38. A computer file reference according to any of the preceding claims 30-37 and wherein said computer file reference is a polychromatic reference.

39. A computer file reference according to any of the preceding claims 30-38 and wherein said inspection output is a polychromatic output.

40. A method for determining a contour element (cel) in each of a plurality of big pixels, each big pixel comprising an array of small pixels, the method comprising:

assigning an array of small pixels to each big pixel;

performing the following steps for each big pixel;

computing a difference of gradients sign (DOG sign) at one vertex of the big pixel;

determining two cross points along two edges of the big pixel, each cross point representing a value crossover between pixels having a first value and pixels having a second value;

determining DOG signs for remaining vertices of the big pixel based on DOG values assigned to neighboring pixels of the big pixel; and

if at least one DOG sign at one vertex of the big pixel differs from at least one DOG sign at one other vertex of the big pixel;

determining remaining cross points along remaining edges of the big pixel; and

assigning a cel based on a result of the determining remaining cross points step.

41. A method for determining a color contour element (cel) in each of a plurality of big pixels, each big pixel comprising an array of small pixels, the method comprising:

assigning an array of small pixels to each big pixel;

performing the following steps for each big pixel;

determining a number of colors of small pixels comprised in the big pixel;

if the number of colors is equal to one, concluding the method;

if the number of colors is greater than two, indicating that a junction exists in the big pixel and terminating the method;

otherwise, the number of colors being two, performing the following steps;

computing a difference of gradients sign (DOG sign) at one vertex of the big pixel;

determining two cross points along two edges of the big pixel, each cross point representing a value crossover between pixels having a first value and pixels having a second value;

determining DOG signs for remaining vertices of the big pixel based on DOG values assigned to neighboring pixels of the big pixel; and

if at least one DOG sign at one vertex of the big pixel differs from at least one DOG sign at one other vertex of the big pixel;

determining remaining cross points along remaining edges of the big pixel; and

assigning a color cel based on a result of the determining remaining cross points step and on the colors of small pixels comprised in the big pixel.

42. An electrical circuit inspection method comprising:

optically inspecting an electrical circuit and providing an inspection output identifying more than two different types of regions; and

analyzing said inspection output, said analyzing including comparing said inspection output with a computer file reference identifying more than two different types of regions.

43. A method for constructing a computer file reference identifying more than two different types of regions on an electrical circuit comprising superimposing in mutual registration at least two computer files, each representing a different layer of said electrical circuit.

44. Apparatus for determining a contour element (cel) in each of a plurality of big pixels, each big pixel comprising an array of small pixels, the apparatus comprising:

a pixel assigner operative to assign an array of small pixels to each big pixel;

a cel determiner operative, for each big pixel;

to compute a difference of gradients sign (DOG sign) at one vertex of the big pixel;

to determine two cross points along two edges of the big pixel, each cross point representing a value crossover between pixels having a first value and pixels having a second value;

to determine DOG signs for remaining vertices of the big pixel based on DOG values assigned to neighboring pixels of the big pixel; and

if at least one DOG sign at one vertex of the big pixel differs from at least one DOG sign at one other vertex of the big pixel;

to determine remaining cross points along remaining edges of the big pixel; and

to assign a cel based on a result of the determining remaining cross points step.

47. An electrical circuit inspection system according to claim 46 and wherein said optical subsystem is capable of optically inspecting more than one layer of an electrical circuit and said more than two different regions include regions at more than one layer of said electrical circuit.

48. An electrical circuit inspection system according to claim 46 or claim 47 and wherein said more than two different regions include an exposed metal region, a metal region covered by a translucent material, an exposed substrate and a substrate covered by said translucent material.

49. An electrical circuit inspection system according to claim 48 and wherein said translucent material is a solder mask.

50. An electrical circuit inspection system according to claim 48 and wherein said translucent material is a polyamide layer.

51. An electrical circuit inspection system according to claim 46 or claim 47 and wherein said more than two different regions include an exposed first metal region, a first metal region covered by a translucent material, an exposed second metal region, a second metal region covered by a translucent material, an exposed substrate and a substrate covered by said translucent material.

52. An electrical circuit inspection system according to claim 51 and wherein said translucent material is a solder mask.

53. An electrical circuit inspection system according to claim 51 and wherein said translucent material is a polyamide layer.

45. Apparatus for determining a color contour element (cel) in each of a plurality of big pixels, each big pixel comprising an array of small pixels, the apparatus comprising:

and assigner operative to assign an array of small pixels to each big pixel;

a color cel determiner operative, for each big pixel;

to determine a number of colors of small pixels comprised in the big pixel;

if the number of colors is equal to one, to conclude the method;

if the number of colors is greater than two, to indicate that a junction exists in the big pixel and terminating the method;

otherwise, the number of colors being two;

to compute a difference of gradients sign (DOG sign) at one vertex of the big pixel;

to determine two cross points along two edges of the big pixel, each cross point representing a value crossover between pixels having a first value and pixels having a second value;

to determine DOG signs for remaining vertices of the big pixel based on DOG values assigned to neighboring pixels of the big pixel; and

if at least one DOG sign at one vertex of the big pixel differs from at least one DOG sign at one other vertex of the big pixel;

to determine remaining cross points along remaining edges of the big pixel; and

to assign a color cel based on a result of the determining remaining cross points step and on the colors of small pixels comprised in the big pixel.

46. An electrical circuit inspection system comprising:

an optical subsystem for optically inspecting an electrical circuit and providing an inspection output identifying edges between at least two different regions in the electrical circuit; and

an analysis subsystem for analyzing said inspection output, said analyzing including comparing said inspection output with a computer file reference identifying edges between at least two different regions.

54. An electrical circuit inspection system according to any of claims 46-53 and wherein said computer file reference identifying more than two different regions comprises a composite of multiple computer files, each representing a different layer of said electrical circuit.

55. An electrical circuit inspection system according to any of claims 46-54 and wherein said computer file reference identifying more than two different regions comprises an overlay of multiple computer files, each representing a different layer of said electrical circuit.

56. An electrical circuit inspection system according to any of claims 46-55 and wherein said computer file reference identifying more than two different regions comprises multiple computer files, each representing a different layer of said electrical circuit, superimposed in mutual registration

57. An electrical circuit inspection system according to any of claims 46-56 and wherein said computer file reference comprises a computer file of at least one metal layer and at least one layer of a translucent material overlying said at least one metal layer, superimposed in mutual registration.

58. An electrical circuit inspection system according to any of claims 46-57 and wherein said computer file reference is a polychromatic reference.

59. An electrical circuit inspection system according to any of claims 46-58 and wherein said inspection output is a polychromatic output.

60. An electrical circuit inspection system according to any of claims 46-59 and wherein said computer file reference comprises at least one CAM file.

61. An electrical circuit inspection system according to any of claims 46-60 and wherein said computer file reference comprises a plurality of CAM files.

62. A method for electrical circuit inspection comprising:

optically inspecting an electrical circuit and providing an inspection output identifying edges between at least two different regions in the electrical circuit; and

analyzing said inspection output, said analyzing including comparing said inspection output with a computer file reference identifying edges between at least two different regions.

63. A method according to claim 62 and wherein said optically inspecting includes optically inspecting more than one layer of an electrical circuit and said more than two different regions include regions at more than one layer of said electrical circuit.

64. A method according to claim 62 or claim 63 and wherein said more than two different regions include an exposed metal region, a metal region covered by a translucent material, an exposed substrate and a substrate covered by said translucent material.

65. A method according to claim 64 and wherein said translucent material is a solder mask.

66. A method according to claim 64 and wherein said translucent material is a polyamide layer.

67. A method according to claim 62 or claim 63 and wherein said more than two different regions include an exposed first metal region, a first metal region covered by a translucent material, an exposed second metal region, a second metal region covered by a translucent material, an exposed substrate and a substrate covered by said translucent material.

68. A method according to claim 67 and wherein said translucent material is a solder mask.

69. A method according to claim 67 and wherein said translucent material is a polyamide layer.

70. A method according to any of claims 62-69 and wherein said computer file reference identifying more than two different regions comprises a composite of multiple computer files, each representing a different layer of said electrical circuit.

71. A method according to any of claims 62-70 and wherein said computer file reference identifying more than two different regions comprises an overlay of multiple computer files, each representing a different layer of said electrical circuit.

72. A method according to any of claims 62-71 and wherein said computer file reference identifying more than two different regions comprises multiple computer files, each representing a different layer of said electrical circuit, superimposed in mutual registration.

73. A method according to any of claims 62-72 and wherein said computer file reference comprises a computer file of at least one metal layer and at least one layer of a translucent material overlying said at least one metal layer, superimposed in mutual registration.

74. A method according to any of claims 62-73 and wherein said computer file reference is a polychromatic reference.

75. A method according to any of claims 62-74 and wherein said inspection output is a polychromatic output.

76. A method according to any of claims 62-75 and wherein said computer file reference comprises at least one CAM file.

77. A method according to any of claims 62-76 and wherein said computer file reference comprises a plurality of CAM files.