Structure and method for fabricating semiconductor structures and devices utilizing electro-optic structures

• US 20030013219A1
• Filed: 07/13/2001
• Published: 01/16/2003
• Est. Priority Date: 07/13/2001
• Status: Abandoned Application

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Tungare, Aroon V., Valliath, George T., Gamota, Daniel R.
• Application Number:
  US09/903,743
• Publication Number:
  US 20030013219A1
• Time in Patent Office: Days
• US Class Current: 438/27
• CPC Class Codes: H01L 27/15 including semiconductor components having potential barriers, specially adapted for light emission
• CPC Class Codes: H01S 5/026 Monolithically integrated components, e.g. waveguides, monitoring photo-detectors, drivers stabilisation of output H01S5/06
• CPC Class Codes: H01S 5/0261 Non-optical elements, e.g. laser driver components, heaters H01S5/0265 takes precedence
• CPC Class Codes: H01S 5/0265 Intensity modulators intra-cavity modulators H01S5/0625
• CPC Class Codes: H01S 5/06243 controlling the position or direction of the emitted beam
• CPC Class Codes: H01S 5/183 having only vertical cavities, e.g. vertical cavity surface-emitting lasers [VCSEL]

Abstract

High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. The accommodating buffer layer is lattice matched to both the underlying silicon wafer and the overlying monocrystalline material layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Electro-optic structures may be integrally provided with such semiconductor structures, which semiconductor structures may also include light-emitting devices and control circuitry.

Claims

1. A semiconductor structure comprising:

a monocrystalline silicon substrate;

an amorphous oxide material overlying the monocrystalline silicon substrate;

a monocrystalline perovskite oxide material overlying the amorphous oxide material;

a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material;

at least one light-emitting device formed using the monocrystalline compound semiconductor material; and

at least one tunable electro-optic structure overlying at least one of the at least one light-emitting device.

2. The semiconductor structure of claim 1, wherein the at least one light-emitting device further comprises any combination of at least one light-emitting device selected from a group comprising a vertical cavity surface emitting laser, an edge emitting laser and a light-emitting diode.

3. The semiconductor structure of claim 1, further comprising:

a diffraction grating layer disposed between at least one of the at least one light emitting device and the at least one tunable electro-optic structure.

4. The semiconductor structure of claim 1, wherein the at least one tunable electro-optic structure comprises a liquid crystal layer disposed between transparent electrodes.

5. The semiconductor structure of claim 4, wherein the transparent electrodes comprise Indium-Tin oxide.

6. The semiconductor structure of claim 4, wherein the at least one tunable electro-optic structure comprises a thin film transistor coupled to at least one of the transparent electrodes.

7. The semiconductor structure of claim 1, wherein at least one of the at least one tunable electro-optic structure imparts at least one change in polarization to light emitted by corresponding ones of the at least one light-emitting device.

8. The semiconductor structure of claim 1, wherein at least one of the at least one tunable electro-optic structure imparts at least one change in phase to light emitted by corresponding ones of the at least one light-emitting device.

9. The semiconductor structure of claim 1, wherein at least one of the at least one tunable electro-optic structure at least one change in direction to light emitted by corresponding ones of the at least one light-emitting device.

10. The semiconductor substrate of claim 1, wherein the monocrystalline silicon substrate comprises at least one control structure used to control operation of the at least one light-emitting device.

11. The semiconductor substrate of claim 1, wherein the monocrystalline silicon substrate comprises at least one control structure used to control operation of the at least one tunable electro-optic structure.

13. The process of claim 12, wherein the forming of the at least one light-emitting device further comprises forming any combination of at least one light-emitting device selected from a group comprising a vertical cavity surface emitting laser, an edge emitting laser and a light-emitting diode.

14. The process of claim 12, further comprising:

forming a diffraction grating layer disposed between at least one of the at least one light emitting device and the at least one tunable electro-optic structure.

15. The process of claim 12, wherein the forming of the at least one tunable electro-optic structure further comprises forming a liquid crystal layer disposed between transparent electrodes.

16. The process of claim 15, wherein the forming of the at least one tunable electro-optic structure further comprises forming the transparent electrodes using Indium-Tin oxide.

17. The process of claim 15, wherein the forming of the at least one tunable electro-optic structure further comprises forming a thin film transistor coupled to at least one of the transparent electrodes.

12. A process for fabricating a semiconductor structure comprising:

providing a monocrystalline silicon substrate;

depositing a monocrystalline perovskite oxide film overlying the monocrystalline silicon substrate, the film having a thickness less than a thickness of the material that would result in strain-induced defects;

forming an amorphous oxide interface layer containing at least silicon and oxygen at an interface between the monocrystalline perovskite oxide film and the monocrystalline silicon substrate;

epitaxially forming a monocrystalline compound semiconductor layer overlying the monocrystalline perovskite oxide film;

forming at least one light-emitting device in the monocrystalline compound semiconductor layer; and

forming at least one tunable electro-optic structure overlying at least one of the at least one light-emitting device.