Clock generation systems and methods
First Claim
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1. A low power a reconfigurable processor core, comprising:
- one or more processing units, each unit having a clock input that controls the performance of the unit;
a wireless transceiver transmitting and receiving at a frequency based on a wireless clock input; and
a controller having a plurality of clock outputs each coupled to the clock inputs of the processing units and the wireless clock input, the clock outputs being generated from a common master clock.
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Abstract
A low power reconfigurable processor core includes one or more processing units, each unit having a clock input that controls the performance of the unit; a wireless transceiver transmitting and receiving at a frequency based on a wireless clock input; and a controller having a plurality of clock outputs each coupled to the clock inputs of the processing units and the wireless clock input, the clock outputs being generated from a common master clock.
50 Citations
20 Claims
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1. A low power a reconfigurable processor core, comprising:
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one or more processing units, each unit having a clock input that controls the performance of the unit;
a wireless transceiver transmitting and receiving at a frequency based on a wireless clock input; and
a controller having a plurality of clock outputs each coupled to the clock inputs of the processing units and the wireless clock input, the clock outputs being generated from a common master clock. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification