Semiconductor device

• US 20030015778A1
• Filed: 07/22/2002
• Published: 01/23/2003
• Est. Priority Date: 07/23/2001
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Soyano, Shin, Mochizuki, Eiji
• Granted Patent: US 6,995,461 B2
• Time in Patent Office: Days
• US Class Current: 257/678
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48095 Kinked
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49111 the connectors connecting two common bonding areas, e.g. Litz or braid wires
• CPC Class Codes: H01L 2224/85444 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/85455 Nickel (Ni) as principal constituent
• CPC Class Codes: H01L 23/045 the other leads having an insulating passage through the base
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/49 of a plurality of wire connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01068 Erbium [Er]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/207 Diameter ranges
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H05K 1/144 : Stacked arrangements of planar printed circuit boards

Abstract

A semiconductor device includes a package composed of a metal base, an enclosure case integrated with terminals, and a top cover. A power circuit and a control circuit are arranged inside the package vertically, and a gel-like filler is injected to seal the package after being assembled. In this semiconductor device, externally lead control terminals for the control circuit are insert-molded in a control terminal block constituting an independent component. The control terminal block is fixed to the enclosure case to extend over a center of a top surface thereof. A printed circuit board of the control circuit is disposed and connected between the control terminal block and a relay terminal block disposed inside the case.

Claims

1. A semiconductor device comprising,

a package composed of a metal base, an enclosure case having first external lead terminals integrated therewith, and a top cover,

a filler filled in the package to seal the same,

a power circuit arranged in the package and having power semiconductor elements mounted thereon, said power circuit being disposed on the metal base and electrically connected to the first external lead terminals,

a control circuit having a printed circuit board, circuit components mounted on the printed circuit board, and first terminals, said control circuit being mounted in the package above the power circuit,

a terminal block fixed to the enclosure case to extend over the same, and having second external lead terminals integrated therewith and second terminals electrically connected with the first terminals of the control circuit, and

a relay terminal block arranged inside the enclosure case between the power circuit and the control circuit for electrically connecting the same, said relay terminal block having third terminals so that the printed circuit board of the control circuit is held and electrically connected between the third terminal of the relay terminal block and the second terminals of the terminal block.

2. A semiconductor device according to claim 1, wherein said circuit components of the control circuit include driving ICs for the power semiconductor elements of the power circuit.

3. A semiconductor device according to claim 2, wherein said driving ICs mounted on the printed circuit board of the control circuit are composed of bare chips.

4. A semiconductor device according to claim 2, wherein said driving ICs mounted on the printed circuit board are arranged according to positions of the power semiconductor elements on the power circuit so that an electrical connection between the driving ICs and the power semiconductor elements is minimized.

5. A semiconductor device according to claim 1, wherein said first external lead terminals in the enclosure case are arranged on one side of the enclosure case, said terminal block is installed close to a center of a top surface of the enclosure case and arranged parallel to the first lead terminals, and said control circuit is arranged in an area between the control terminal block and a side of the enclosure case opposite to the first lead terminals relative to the terminal block.

6. A semiconductor device according to claim 1, wherein said top cover of the package has a terminal leader slot having a size larger than a top portion of the terminal block.

7. A semiconductor device according to claim 1, wherein said top cover of the package has spacing projections provided on a back surface thereof, said spacing projection facing the printed circuit board of the control circuit.

8. A semiconductor device according to claim 7, wherein said top cover has a recess portion formed in a top surface thereof, and said spacing projections are provided on a back surface of the recess portion of the top cover.

9. A semiconductor device according to claim 1, wherein said terminal block is provided with guide pins for positioning and supporting the printed circuit board of the control circuit.

10. A semiconductor device according to claim 1, wherein said terminal block has support portions formed at respective ends thereof, and said enclosure case of the package has groove portions formed in an inner surface thereof for receiving the support portions of the terminal block to join thereto with adhesive.

11. A semiconductor device according to claim 10, wherein said support portions have adhesive injection holes opened in top surfaces thereof, and said groove portions have adhesive guide channels formed at inner surfaces of the groove portions for guiding the adhesive injected through the adhesive injection holes.

12. A semiconductor device according to claim 1, further comprising cooling fins placed on the metal base of the semiconductor device, a first apparatus printed circuit board having terminal insertion holes for receiving the first external terminals of the semiconductor device to be soldered thereto, and a second apparatus printed circuit board having a connector for receiving the second external terminals of the semiconductor device.

13. A semiconductor device according to claim 12, wherein said first external terminals of the semiconductor device are composed of pin-shaped or plate-shaped lead terminals made of a material to be bent easily and are arranged linearly on a top surface of the package, said lead terminals being formed in a shape to fit the terminal insertion holes of the first apparatus printed circuit board and welded thereto.

14. A semiconductor device according to claim 13, wherein said lead terminals are made of copper and are plated with nickel, solder, or gold.

15. A semiconductor device according to claim 12, wherein said first external terminals of the semiconductor device are formed in an L-shape, and said terminal insertion holes are formed along an edge of the first apparatus printed circuit board so that the first apparatus printed circuit board is mounted laterally to the semiconductor device to extend vertically thereto.