Semiconductor storage device having page copying
First Claim
1. A semiconductor storage device comprising:
- a memory cell array which data is written into and read from every page; and
control circuit which is connected to said memory cell array and which rewrites at least part of data in data of one page read from an arbitrary page in said memory cell array and which writes the rewritten data into another page in said memory cell array.
5 Assignments
0 Petitions
Accused Products
Abstract
Data read from memory cells of one page in a memory cell array that corresponds to a page address of a copy source is sensed and latched by a sense/latch circuit. The sense/latch circuit has a plurality of latch circuits, and the plurality of latch circuits is specified according to the column address. The latch circuit specified in accordance with the column address is supplied with the data to be rewritten. The latch circuit specified in accordance with its address latches the data to be rewritten, whereby rewriting of the data is performed. The data of one page after rewritten is written into the page in the memory cell array that corresponds to the page address of a copy destination.
20 Citations
17 Claims
-
1. A semiconductor storage device comprising:
-
a memory cell array which data is written into and read from every page; and
control circuit which is connected to said memory cell array and which rewrites at least part of data in data of one page read from an arbitrary page in said memory cell array and which writes the rewritten data into another page in said memory cell array. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
-
-
11. A semiconductor storage device comprising:
-
a memory cell array constituted of a plurality of word lines, a plurality of bit lines, and a plurality of memory cells which is connected to said plurality of word lines and said plurality of bit lines, writing and reading of data are performed every page which is constituted of said plurality of memory cells commonly connected to one word line;
a row decoder which is connected to said plurality of word lines and which selects an arbitrary word line from said plurality of word lines to select an arbitrary page in said memory cell array; and
a sense/latch circuit which is connected to said plurality of word lines and which senses data of one page read from said memory cell array and which latches the sensed data when reading data from said memory cell array and which supplies said memory cell array with the latched data of one page and which rewrites arbitrary data from the latched data of one page when writing data in said memory cell array. - View Dependent Claims (12, 13, 14, 15, 16)
-
-
17. An operation method of a semiconductor storage device, comprising:
-
reading data in parallel from a plurality of memory cells in a certain memory area of a non-volatile semiconductor storage device that has a plurality of memory areas each including a plurality of memory cells;
latching said read data by a plurality of latch circuits, and rewriting at least part of said data latched by said plurality of latch circuits; and
writing said data at least part of which is rewritten into said plurality of memory cells of said memory area which is different from said memory area from which said data is read.
-
Specification