Capacitive sensor system with improved capacitance measuring sensitivity

• US 20030016849A1
• Filed: 04/25/2002
• Published: 01/23/2003
• Est. Priority Date: 04/27/2001
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Atrua Technologies Incorporated (Apple Inc.)
• Inventors: Andrade, Thomas L.
• Granted Patent: US 7,256,589 B2
• Time in Patent Office: Days
• US Class Current: 382/124
• CPC Class Codes: G01L 1/146 for measuring force distributions, e.g. using force arrays G01L1/148 takes precedence
• CPC Class Codes: G06V 40/1306 non-optical, e.g. ultrasonic or capacitive sensing

Abstract

A capacitance sensor system and method includes a capacitive sensor as an array of sensor electrodes near the surface of the integrated circuit and charge pump circuits for measuring the capacitance at each sensor electrode. Shield electrodes and unused sense electrodes are used for background capacitance cancellation at each array location. The shield electrodes are switched between the circuit supply potentials in a manner synchronous to the capacitance sensing at the sense electrodes. The improved background capacitance cancellation allows all circuitry to be located outside the sensor array. The capacitance data is used to determine the positions of fingerprint artifacts and other fingerprint features.

Claims

1. A capacitance sensor device comprising:

a semiconductor integrated circuit;

a sensor electrode array arranged in a two dimensional array of n rows and m columns;

a shield electrode array arranged in a one dimensional array of m columns;

a quantity of m amplifiers with inputs attached to the charge pump circuit inputs and outputs attached to each shield electrode;

a quantity of n charge pump circuits;

a quantity of m blocks of n switches that allows the connection of one of the m sensor electrodes along a column to a charge pump circuit; and

a quantity of m blocks of 2n switches that allows the connection of the amplifier output to the connection of a shield electrode or to any unused sensor electrodes within the column.

2. The sensor in claim 1, wherein no MOS devices within the integrated circuit are beneath or between any sensor or shield electrodes.

3. A capacitance sensor device comprising:

a semiconductor integrated circuit;

a sensor electrode array arranged in a two dimensional array of n rows and m columns;

a shield electrode array arranged in a one dimensional array of m columns;

a quantity of m switched level drivers with output levels of Vcc and 0 and switching synchronous to the charge pump circuits outputs attached to each of the m shield electrodes;

a quantity of m charge pump circuits;

a quantity of m blocks of n switches that allows the connection of one of the m sensor electrodes along a column to a charge pump circuit; and

a quantity of m blocks of 2n switches that allows the connection of the amplifier output to the connection of a shield electrode or to any unused sensor electrodes within the column.

4. The sensor in claim 3, wherein no MOS devices within the integrated circuit are beneath or between any sensor or shield electrodes.

5. A capacitance sensor device comprising:

a semiconductor integrated circuit;

a sensor electrode array arranged in a two dimensional array of n rows and m columns;

a shield electrode array arranged in a one dimensional array of n rows;

a quantity of n switched level drivers with output levels of Vcc and 0, and when addressed, switching synchronous to the charge pump circuits, and with outputs connected to each of the n shield electrodes;

a quantity of m charge pump circuits; and

a quantity of m blocks of n switches that allows the connection of one of the n sensor electrodes along a column to a charge pump circuit.

6. The sensor in claim 5, wherein no MOS devices within the integrated circuit are beneath or between any sensor or shield electrodes.

7. A capacitance sensor system comprising:

a semiconductor integrated circuit in which no MOS devices are beneath or between any sensor or shield electrodes;

a plurality of sensor and shield electrodes; and

a plurality of circuits.

8. A capacitance sensor device comprising:

a semiconductor integrated circuit;

a plurality of sensor electrodes arranged as an array;

a plurality of shield electrodes;

a plurality of amplifier circuits;

a plurality of charge pump circuits; and

a plurality of switches that allows the connection amongst the circuits and the electrodes.

9. The sensor in claim 8, wherein no MOS devices within the integrated circuit are beneath or between any sensor or shield electrodes.

10. A capacitive sensor for detecting capacitive variations associated with physical contact between a finger and a surface of the sensor, the capacitive sensor characterized in that:

all electronic circuits other than electrodes are located physically outside an area associated with physical contact by the finger at which are disposed a plurality of sensor electrodes.

11. The capacitive sensor of claim 10, further characterized in that the electronic circuits are all active circuits.

12. The capacitive sensor of claim 10, further characterized in that the electronic circuits are all transistor circuits.

13. The capacitive sensor of claim 10, further characterized in that the capacitive sensor includes a plurality of rows and columns and each of the columns is individually addressable.

14. The capacitive sensor of claim 13, further characterized in that sense electrodes from different rows simultaneously addressable.

15. The capacitive sensor of claim 10, further characterized in that the capacitive sensor is a fingerprint swipe sensor in which the tip of a finger is moved relative to the sensor and in physical contact with a surface of the sensor.

16. The capacitive sensor of claim 10, further characterized in that a charge-pump electronic circuit is used for determining capacitance between electrical nodes of the sensor.

17. The capacitive sensor of claim 10, further characterized in that localized reference capacitance cancellation is used.

18. The capacitive sensor of claim 10, further characterized in that a switch matrix physically external to the sensor area is used.

19. The capacitive sensor of claim 10, further characterized in that a column-shared reference capacitance cancellation is used.

20. The capacitive sensor of claim 10, further characterized in that an array-shared reference capacitance cancellation is used.

21. The capacitive sensor of claim 10, further characterized in that a row-shared reference cancellation is used.

22. The capacitive sensor of claim 10, further characterized in that a row-shared reference cancellation and column switch matrixes external to the sensor array are used.

23. A method of operating a capacitive sensor to capture at least a portion of a fingerprint.