Light receiving semiconductor device with PIN structure

• US 20030017681A1
• Filed: 07/03/2002
• Published: 01/23/2003
• Est. Priority Date: 07/06/2001
• Status: Active Grant

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Yano, Hiroshi, Yanagisawa, Masaki
• Granted Patent: US 6,593,635 B2
• Time in Patent Office: Days
• US Class Current: 438/466
• CPC Class Codes: H01L 31/02161 for devices characterised by at least one potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/03042 characterised by the doping material
• CPC Class Codes: H01L 31/035272 characterised by at least one potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/035281 Shape of the body
• CPC Class Codes: H01L 31/105 the potential barrier being of the PIN type
• CPC Class Codes: H01L 31/1844 comprising ternary or quaternary compounds, e.g. Ga Al As, In Ga As P
• CPC Class Codes: Y02E 10/544 Solar cells from Group III-V materials
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells

Abstract

The present invention relates to a PIN photo diode, whish shows both high sensitivity and superior high frequency performance by the reduction of the dark current and the intrinsic capacitance. The PIN diode comprises a substrate made of InP, n-type layer made of InGaAs doped with Si, i-type layer made of GaInAs with unintentionally doped, and the p-type layer made of GaInAs doped with Zn, respective layers are sequentially grown and formed to a mesa structure by conventional technique. A passivation layer of InP covers the p-type layer and the i-type layer. The thickness h2 of a center region of the p-type layer is thinner than the thickness h1 of other region surrounding the center. By the configuration, the reduction of the dark current, the enhancing of the high frequency performance by the reduction of the intrinsic capacitance, and the improvement of the sensitivity by the decreasing the absorption in the p-type layer are achieved.

Claims

1. A light receiving semiconductor device comprising:

a semiconductor substrate;

a first semiconductor layer provided on said semiconductor substrate, said first layer being doped with a first conducting type impurities;

a second semiconductor layer provided on said first layer and made of a first semiconductor material, said second layer being unintentionally doped;

a third layer provided on said second layer and made of the first semiconductor, said third layer being doped with a second conducting type impurities, said third layer and said second layer; and

a fourth semiconductor layer made of a unintentionally doped second semiconductor material, said fourth layer covering the first layer, the second layer and the third layer,

wherein a thickness of a first region of said third layer is thinner than a thickness of a second region of said third layer, the second region surrounding the first region therein.

2. The light receiving device according to the claim 1, wherein a band gap energy of the second semiconductor material is larger than a band gap energy of the first semiconductor material.

3. The light receiving device according to claim 2, wherein the first semiconductor material is GaInAs, a lattice constant of GaInAs being substantially matched to InP, and the second semiconductor material is InP.

4. The light receiving device according to claim 1, further comprising an insulating film covering the fourth layer therewith.

5. The light receiving device according to claim 1, wherein the first conducting type is n-type and the second conducting type is p-type.

6. The light receiving device according to claim 1, further comprising an electrode provided on the first region of the third layer.

7. The light receiving device according to claim 2, further comprising an electrode provided on the second region of the third layer.

8. The light receiving device according to claim 1, wherein the thickness of the peripheral portion of the third layer is greater than 0.2 um and not greater than 0.5 um.

9. The light receiving device according to claim 1, wherein the thickness of the center portion of the third layer is greater than 0.02 nm and not greater than 0.25 um.

10. A light receiving device comprising:

a semiinsulating InP substrate;

an n-type InGaAs layer, said n-type layer being substantially lattice-matched to the InP substrate;

an i-type InGaAs light absorbing layer, said i-type layer being substantially lattice-matched to said InP substrate;

a p-type InGaAs layer, said p-type layer being substantially lattice-matched to said InP substrate; and

an un-doped InP layer covering said p-type layer, said i-type layer and said n-type layer therein,

wherein a thickness of a center portion of said p-type layer is thinner than a thickness of a peripheral portion surrounding said center portion therewith of said third layer.

11. The light receiving device according to claim 10, wherein the thickness of the center portion of the third layer is greater than 0.02 um and not greater than 0.25 um.

12. The light receiving device according to claim 10, wherein the thickness of the peripheral portion of the third layer is greater than 0.2 um and not greater than 0.5 um.

13. The light receiving device according to claim 10, wherein the p-type layer is doped with Zn.

14. The light receiving device according to claim 10, wherein the n-type layer is doped with Si.