Semiconductor arrangement with a MOS-transistor and a parallel Schottky-diode

• US 20030020134A1
• Filed: 05/16/2002
• Published: 01/30/2003
• Est. Priority Date: 05/17/2001
• Status: Active Grant

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Hirler, Franz, Werner, Wolfgang, Rieger, Walter, Krumrey, Joachim
• Granted Patent: US 6,998,678 B2
• Time in Patent Office: Days
• US Class Current: 257/471
• CPC Class Codes: H01L 27/0705 comprising components of the field effect type
• CPC Class Codes: H01L 29/0626 with a localised breakdown region, e.g. built-in avalanching region in self-protected thyristors H01L29/7424
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/41766 with at least part of the source or drain electrode having contact below the semiconductor surface, e.g. the source or drain electrode formed at least partially in a groove or with inclusions of conductor inside the semiconductor H01L29/41733 - H01L29/41758 take precedence
• CPC Class Codes: H01L 29/42368 the thickness being non-uniform
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7809 having both source and drain contacts on the same surface, i.e. Up-Drain VDMOS transistors
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

The present invention relates to a semiconductor arrangement with a MOS transistor which has a gate electrode (40), arranged in a trench running in the vertical direction of a semiconductor body (100), and a Schottky diode which is connected in parallel with a drain-source path (D-S) and is formed by a Schottky contact between a source electrode and the semiconductor body.

Claims

1. A semiconductor arrangement having the following features:

a semiconductor body (100) having a first terminal zone (10, 12;

10A, 12) of a first conduction type (n), a second terminal zone (30) of the first conduction type (n) and a body zone (20) of a second conduction type, which body zone is formed between the first and second terminal zones (10, 12, 30;

10A, 12, 30), the first terminal zone (10, 12, 10A, 12), the body zone (20) and the second terminal zone (30) being arranged one above the other at least in sections in the vertical direction of the semiconductor body (100),

a control electrode (40), which is formed in a manner insulated from the semiconductor body (100) in a trench which extends in the vertical direction of the semiconductor body (100) from the second terminal zone (30) through the body zone (20) right into the first terminal zone (10, 12;

10A, 12),

a terminal electrode (60), which contact-connects the second terminal zone (30) and the body zone (20) and is insulated from the control electrode (40),

a Schottky contact, which is formed between the terminal electrode (60) and the first terminal zone (12) adjacent to the body zone (20).

2. The semiconductor arrangement as claimed in claim 1, in which the first terminal zone (12) extends in sections as far as a front side (101) of the semiconductor body (100), the Schottky contact being formed at the front side (101) of the semiconductor body (100).

3. The semiconductor arrangement as claimed in claim 1, in which the first terminal electrode (60) is formed in sections in a second trench (62) running in the vertical direction of the semiconductor body (100), the Schottky contact being formed in the second trench (62).

4. The semiconductor arrangement as claimed in claim 3, in which the body zone (20) and the second terminal zone (30) are uncovered at sidewalls of the trench (62) and are contact-connected by the terminal electrode (60).

5. The semiconductor arrangement as claimed in one of the preceding claims, in which the semiconductor body (100) is composed of silicon, and in which, in order to form the Schottky contact, the doping of the first terminal zone (12) in the region of the Schottky contact is less than 1·

10¹⁷.

6. The semiconductor arrangement as claimed in one of the preceding claims, in which the terminal electrode (60) has aluminum, tungsten silicide, tantalum silicide, platinum silicide, cobalt silicide or titanium silicide in the region of the Schottky contact.

7. The semiconductor arrangement as claimed in one of the preceding claims, in which the control electrode (40) is formed as field plate (42) in the region of the first terminal zone (12), said field plate being surrounded by a thicker insulation layer (54) in this region than in the region of the body zone (20) and of the second terminal zone (20).

8. The semiconductor arrangement as claimed in one of the preceding claims, in which regions with a Schottky contact (14) and regions (15) without a Schottky contact are arranged in the transition region between the first terminal electrode (60) and the first terminal zone (12).

9. The semiconductor arrangement as claimed in claim 8, in which the regions with a Schottky contact (14) and the regions without a Schottky contact alternate with one another.

10. The semiconductor arrangement as claimed in claim 8 or 9, in which the regions with a Schottky contact (14) have a higher breakdown voltage than the regions (15) without a Schottky contact.

11. The semiconductor arrangement as claimed in claim 8, 9 or 10, in which the regions (15) without a Schottky contact are doped more highly than the first terminal zone (12).

12. The semiconductor arrangement as claimed in one of claims 8 to 11, in which the regions (15) without a Schottky contact are regions of the second conduction type.

13. The semiconductor arrangement as claimed in claim 11 or 12, in which the more highly doped regions (15) without a Schottky contact also serve as contact for the body zone (20).

14. The semiconductor component as claimed in one of claims 8 to 13, in which the first terminal zone (12) extends in sections as far as the front side (101) of the semiconductor body (100), the regions with a Schottky contact (14) and the regions (15) without a Schottky contact being formed at the front side (101) of the semiconductor body (100).

15. The semiconductor arrangement as claimed in one of claims 8 to 13, in which the first terminal electrode (60) is formed in sections in a further trench (62) running in the vertical direction of the semiconductor body (100), the regions with a Schottky contact (14) and the regions (15) without a Schottky contact being formed in a manner adjoining the further trench (62).

16. The semiconductor arrangement as claimed in one of claims 8 to 15, in which mesa regions which are formed between the trenches (17) and in which are situated the further trenches (62), the body zones (20) and the second terminal zones (30) are narrower in regions with a Schottky contact (14) than in regions (15) without a Schottky contact.

17. The semiconductor arrangement as claimed in one of the preceding claims, in which, in regions with a Schottky contact (14), the Schottky barrier voltage is set by ion implantation.

18. The semiconductor arrangement as claimed in one of the preceding claims, in which a second terminal electrode (70) is provided on that side of the semiconductor body (100) which is opposite to the first terminal electrode (60).

19. The semiconductor arrangement as claimed in one of claims 1 to 17, in which a second terminal electrode (70) is provided on the same side (101) of the semiconductor body (100) as the first terminal electrode (60).