Surface capacitance sensor system using buried stimulus electrode

• US 20030020495A1
• Filed: 05/22/2002
• Published: 01/30/2003
• Est. Priority Date: 05/22/2001
• Status: Active Grant

• Current Assignee: Apple Inc.
• Original Assignee: Atrua Technologies Incorporated (Apple Inc.)
• Inventors: Andrade, Thomas L.
• Granted Patent: US 7,259,573 B2
• Time in Patent Office: Days
• US Class Current: 324/686
• CPC Class Codes: G01D 5/24 by varying capacitance
• CPC Class Codes: G01D 5/2405 by varying dielectric
• CPC Class Codes: G06V 40/1306 non-optical, e.g. ultrasonic or capacitive sensing

Abstract

A surface capacitance sensor system is implemented as an array of sensor electrodes near the surface of the integrated circuit and an array of stimulus electrodes below the sensor electrodes. Rows of stimulus electrodes are driven by sources while the voltages at the respective sensor electrodes are measured. Voltage measurements at each sensor electrode allow the surface capacitance at each sensor electrode location to be determined. The capacitance data is used to determine the positions of target electrodes above the array surface as required in the location fingerprint artifacts.

Claims

1. A capacitance sensor device comprising:

a semiconductor integrated circuit;

a sensor electrode array arranged in a two dimensional array of n rows and m columns;

a stimulus electrode array arranged in a one dimensional array of n rows;

a quantity of n time-varying voltage sources connected to n rows of stimulus electrodes;

a quantity of m time-varying voltmeters; and

a quantity of m blocks of n switches that allows the connection of one of the n sensor electrodes along a column to one time-varying voltmeter.

2. The sensor in claim 1, wherein no MOS devices within the integrated circuit are beneath or between any sensor or stimulus electrodes.

3. A capacitance sensor device comprising:

an integrated circuit;

a two-dimensional sensor electrode array having n rows×

m columns of electrodes;

a stimulus electrode array arranged in a one dimensional array of n rows;

a plurality of n time-varying voltage sources connected to n rows of stimulus electrodes;

a plurality of m time-varying voltmeters; and

a plurality of m blocks of n switches that allows the connection of one of the n sensor electrodes along a column to one time-varying voltmeter.

4. The sensor in claim 3, wherein the device includes MOS devices within the integrated circuit and no MOS devices within the integrated circuit are beneath or between any sensor or stimulus electrodes.

5. A capacitive sensor device of the type having MOS circuit devices, sensor electrodes and stimulus electrodes, said capacitive sensor device characterized in that there are no MOS circuit devices beneath or between any sensor or stimulus electrode.