Liquid crystal display device

• US 20030020677A1
• Filed: 07/11/2002
• Published: 01/30/2003
• Est. Priority Date: 07/27/2001
• Status: Active Grant

• Current Assignee: Nec-Mitsubishi Electronics Visual Systems Corporation
• Original Assignee: Nec-Mitsubishi Electronics Visual Systems Corporation
• Inventors: Nakano, Takao
• Granted Patent: US 6,831,621 B2
• Time in Patent Office: Days
• US Class Current: 345/87
• CPC Class Codes: G09G 2310/0235 Field-sequential colour display
• CPC Class Codes: G09G 2310/024 Scrolling of light from the illumination source over the display in combination with the scanning of the display screen
• CPC Class Codes: G09G 2310/066 Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2320/0261 in the context of movement of objects on the screen or movement of the observer relative to the screen
• CPC Class Codes: G09G 2320/0633 by amplitude modulation of the brightness of the illumination source
• CPC Class Codes: G09G 2320/064 by time modulation of the brightness of the illumination source
• CPC Class Codes: G09G 2340/16 Determination of a pixel data signal depending on the signal applied in the previous frame
• CPC Class Codes: G09G 3/3413 Details of control of colour illumination sources
• CPC Class Codes: G09G 3/342 using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
• CPC Class Codes: G09G 3/3611 Control of matrices with row and column drivers
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

A liquid crystal display device is provided. An image memory (4) stores therein input pixel data (R_in, B_in, G_in) on a frame-by-frame basis. Differencing circuits (23 to 25) calculate respective difference data ((R_in−G_pre), (B_in−R_in), (G_in−B_in)) on a pixel-by-pixel basis. Comparator circuits (27, 28, 29) output a pulse when the difference data is greater than a difference level (DLV). Counter memories (30 to 32) perform a counting operation each time the pulse is inputted thereto, and output respective counts (FLN_R, FLN_B, FLN_G) after the counting operation for one line. Comparator circuits (34 to 36) output a pulse to skip flag registers (37 to 39), respectively, when the respective counts are greater than a skip level. Skip flags (SPF_Ri, SPF_Bi, SPF_Gi) corresponding to a current line are set at “1.” A gate pulse for the line corresponding to the skip flags “1” is skipped. This reduces the write time of image data.

Claims

1. A liquid crystal display device comprising:

a transmissive liquid crystal display panel devoid of any color filter;

an image data processor for converting one frame of an image including a plurality of color components into a plurality of subframes each consisting of a single color component to output said subframes in predetermined order;

a driver circuit for driving said liquid crystal display panel based on said subframes received from said image data processor;

a backlight for illuminating a backside of said liquid crystal display panel, and including a light source for emitting light of a plurality of colors;

a backlight controller for controlling said backlight to turn on to emit light of a color corresponding to a color component of each of said subframes in a time-shared manner in synchronism with the time at which said driver circuit writes each of said subframes into said liquid crystal display panel;

a judging circuit for calculating difference data between adjacent ones of said subframes which are successive in display order on a pixel-by-pixel basis to judge whether or not there is a subframe-to-subframe difference therebetween on a line-by-line basis, based on said difference data for one line; and

a controller for temporarily shortening a write cycle duration of a clock for defining the timing of writing of image data for a line judged by said judging circuit to be devoid of the subframe-to-subframe difference into said liquid crystal display panel,

wherein said driver circuit reduces a pulse width of an address signal to be applied to a scanning line of said liquid crystal display panel in accordance with said write cycle duration.

2. The liquid crystal display device according to claim 1,

wherein said write cycle duration of the clock for defining the timing of writing of the image data for the line judged to be devoid of the subframe-to-subframe difference into said liquid crystal display panel is set to a duration long enough to provide the same amount of electric charge as discharged to said liquid crystal display panel.

3. The liquid crystal display device according to claim 1, further comprising

a second controller for specifying a predetermined number of lines for which said write cycle duration is temporarily shortened in ascending order of the subframe-to-subframe difference.

4. The liquid crystal display device according to claim 1, further comprising

a second judging circuit for judging whether or not the subframe-to-subframe difference throughout a predetermined number of frames is large,

wherein said image data processor outputs said subframes so that at least one set of said subframes consisting of the same color component are successive in display order during a period during which said second judging circuit judges that the subframe-to-subframe difference is large.

5. The liquid crystal display device according to claim 4, wherein

a display period of subframes consisting of the same color component which are successive in display order is shortened.

6. The liquid crystal display device according to claim 5, wherein

a brightness of said backlight corresponding to said subframes whose display period is shortened is increased.

7. The liquid crystal display device according to claim 1, wherein

during a period during which liquid crystal cells of said liquid crystal display panel respond by writing of one of said subframes, said backlight controller turns on light corresponding to a color component of said one subframe so that brightness gradually increases, and turns on light corresponding to a color component of its immediately preceding subframe adjacent in display order so that brightness gradually decreases.

8. The liquid crystal display device according to claim 7, wherein

a drive signal provided to said backlight is a PWM (pulse width modulated) signal.

9. The liquid crystal display device according to claim 7, wherein

a drive signal provided to said backlight is an amplitude-modulated signal.

10. The liquid crystal display device according to claim 1, wherein

said backlight includes a plurality of light sources arranged in corresponding relation to scanning lines of said liquid crystal display panel, and

said backlight controller controls said plurality of light sources to sequentially delay the lighting timing of said plurality of light sources in accordance with the driving speed of said driver circuit.

11. The liquid crystal display device according to claim 1, wherein

said liquid crystal display panel has an OCB (Optically Self-Compensated Birefringence) mode using bend alignment of nematic liquid crystal.