Media cipher smart card

• US 20030024994A1
• Filed: 08/03/2001
• Published: 02/06/2003
• Est. Priority Date: 08/03/2001
• Status: Active Grant

• Current Assignee: Google Technology Holdings LLC (Alphabet Inc.)
• Original Assignee: General Instrument Corporation (CommScope Holding Company, Inc.)
• Inventors: Ladyansky, Stephen Joseph
• Granted Patent: US 6,758,404 B2
• Time in Patent Office: Days
• US Class Current: 235/492
• CPC Class Codes: G06K 19/0702 the arrangement including a battery
• CPC Class Codes: G06K 19/073 Special arrangements for circuits, e.g. for protecting identification code in memory protection against unauthorised use of computer memory G06F12/14
• CPC Class Codes: G06K 19/077 Constructional details, e.g. mounting of circuits in the carrier

Abstract

A chip card is provided which is equipped with a thin film battery, such as those that utilize a LiPON electrolyte. Since the battery does not require venting, it can be sealed within the card, thereby making the card more tamper resistant. Moreover, the terminals of the battery and memory are encased in an epoxy resin, and a volatile memory type is employed. This improves the resistance of the card toward common tampering schemes involving the use of sulfuric acid or other mineral acids. In particular, if such acids are used in an attempt to access the memory module in order to tamper with the card, they will dissolve the epoxy resin around the battery terminals, resulting in a short circuit and erasing the memory contents of the card.

Claims

1. A chip card, comprising a thin film battery.

2. The chip card according to claim 1, wherein said battery has a solid-state electrolyte.

3. The chip card according to claim 2, wherein said electrolyte comprises lithium phosphorous oxynitride.

4. The chip card according to claim 1, wherein the battery comprises a lithium anode having a layer of lithium phosphorous oxynitride thereon.

5. The chip card according to claim 1, wherein said battery is hermetically sealed within the card.

6. The chip card according to claim 1, further comprising a volatile memory unit.

7. The chip card according to claim 6, wherein said volatile memory unit is selected from the group consisting of RAM, DRAM and SRAM.

8. The chip card according to claim 6, wherein said volatile memory unit is an SRAM memory unit.

9. The chip card according to claim 6, wherein said memory unit is encapsulated in an epoxy resin.

10. The chip card according to claim 9, further comprising a first conductive element and a second conductive element, and wherein said battery further comprisies an anode and a cathode which are in electrical contact with said volatile memory unit by means of said first and second conductive elements, respectively, and wherein at least a portion of said first and second conductive elements are also encapsulated in an epoxy resin.

11. The chip card according to claim 10, wherein said first and second conductive elements are encapsulated in an epoxy resin in the vicinity of said memory unit.

12. The chip card according to claim 1, wherein said chip card further comprises a microprocessing unit.

13. A chip card, comprising:

a substrate;

a volatile memory device disposed on said substrate; and

a battery in electrical contact with said memory device by way of first and second conductive elements, said first and second conductive elements being of opposite polarity;

wherein said memory device is encapsulated in an epoxy resin, and wherein said first and second conductive elements are also encapsulated in an epoxy resin in the vicinity of said memory device.

14. The chip card according to claim 13, wherein said memory device is of a type selected from the group consisting of RAM, DRAM and SRAM.

15. The chip card according to claim 13, wherein said volatile memory unit is an SRAM memory unit.

16. The chip card according to claim 13, wherein said chip card further comprises a microprocessing unit.

17. The chip card according to claim 13, wherein said battery is a thin film battery.

18. The chip card according to claim 17, wherein said battery includes a solid-state electrolyte.

19. The chip card according to claim 18, wherein said electrolyte comprises lithium phosphorous oxynitride.

20. The chip card according to claim 17, wherein the battery comprises a lithium anode having a layer of lithium phosphorous oxynitride thereon.

21. The chip card according to claim 17, wherein said battery is hermetically sealed within the card.

22. The chip card according to claim 17, wherein said memory device is disposed within a chip module, and wherein said battery is disposed on a surface of said chip module.

23. The chip card according to claim 17, wherein said memory device is disposed within a chip module, and wherein said battery is also disposed within said chip module.

24. A credit card sized apparatus including:

a battery;

an external power source input for coupling to an external power source; and

a microprocessor being coupled to the external power source input and to the battery, said microprocessor trickle charging the battery when an external power source is coupled to the external power source input.

25. The apparatus according to claim 25, wherein the microprocessor includes at least one digital output port, which is coupled to the battery.

26. The apparatus according to claim 25, wherein the microprocessor transmits a series of digital pulses to the battery when the external power source is coupled to the external power source input.

27. The apparatus according to claim 26, wherein the microprocessor transmits a pseudorandom sequence of digital pulses to the battery when the external power source is coupled to the external power source input.

28. A method for charging a battery comprising:

coupling the battery terminals to a microprocessor output port; and

transmitting a digital signal to the battery from the microprocessor port when the microprocessor is powered from a power source other than the battery.

29. The method according to claim 28, further comprising transmitting a pseudorandom sequence of digital pulses to the battery.

30. The method according to claim 28, wherein the battery comprises a thin film battery with a solid electrolyte.

31. The method according to claim 28, further comprising connecting the terminals of the battery directly to the microprocessor output port without intermediate devices.

32. The method according to claim 28, further comprising connecting the terminals of the battery directly to the microprocessor output port through a diode.