Multi-input differential circuit

• US 20030025533A1
• Filed: 06/24/2002
• Published: 02/06/2003
• Est. Priority Date: 06/25/2001
• Status: Abandoned Application

• Current Assignee: Nanopower Solutions Incorporated
• Original Assignee: Nanopower Solutions Incorporated
• Inventors: Ikura, Yasuhide, Yano, Tatsuhiro, Akita, Shin-ichi
• Application Number:
  US10/179,458
• Publication Number:
  US 20030025533A1
• Time in Patent Office: Days
• US Class Current: 327/71
• CPC Class Codes: H03F 2203/45352 the AAC comprising a combination of a plurality of transistors, e.g. Darlington coupled transistors
• CPC Class Codes: H03F 2203/45454 the CSC comprising biasing means controlled by the input signal
• CPC Class Codes: H03K 5/2481 with at least one differential stage

Abstract

The invention provides a NANO-ampere operable differential circuit by means of a few additional components. The multi-input differential circuit consists of more than three input elements that are connected to the same tail node, and an adaptive bias current control circuit. Applications of this multi-input differential circuit, which are, for instance comparators and voltage followers, do have a very low operation current at a normal operation mode. The proposed differential circuit is applicable for all kinds of analog complex circuits to attain nano-power operation.

Claims

1. A differential amplifier with three or more multi-inputs comprising;

a bias current control circuit, and n counts of input devices connected to the said bias current control circuit, and n counts of load devices connected to the said input devices and at least some of them compose a current mirror circuit, whereby said input devices and said load devices form n counts of amplifiers;

of which at least one has no theoretical offset; and

at least one has theoretical plus offset; and

at least one has theoretical minus offset.

2. A differential amplifier with three or more multi-inputs comprising;

a bias current generator, and a bias current control circuit connected to the said bias current generator to make a mirror current, and N counts of input devices connected to the said bias current control circuit, and N counts of load devices connected to the said input devices and at least some of them compose a current mirror circuit, whereby said input devices and said load devices form N counts of amplifiers, and whereby the mirror current of the said bias control circuit is smaller than total sum of said mirror currents of the load devices, and larger than sum of said mirror currents of the load devices excluding maximum mirror current.

3. A differential amplifier with three or more multi-inputs comprising;

a current conversion circuit and a differential circuit claimed in 1 or 2;

whereby at least one of said amplifiers has predefined theoretical offset and is connected to the said current conversion circuit to modify the current of the bias control current according to said predefined theoretical offset.

4. A differential amplifier with three or more multi-inputs claimed in 1 or 2;

whereby said each input device or said each load device consists of plural active elements or passive elements.