Power on self test (POST) and extended self test (EST) for ultrasonic imaging system

• US 20030028341A1
• Filed: 07/31/2001
• Published: 02/06/2003
• Est. Priority Date: 07/31/2001
• Status: Active Grant

• Current Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Martin, William R., McKernan, Thomas P., Powell, Melissa A., Fallon, Joseph R.
• Granted Patent: US 6,678,626 B2
• Time in Patent Office: Days
• US Class Current: 702/117
• CPC Class Codes: G01S 7/52034 Data rate converters
• CPC Class Codes: G01S 7/5205 Means for monitoring or calibrating

Abstract

An ultrasonic imaging system including a power on self test (POST) and an extended self test (EST). The POST includes (a) a verification test, (b) a register test (c) a controller test, (d) a receive digital signal path test and (e) a basic front end test. The POST is initiated, performed and completed within a short time, such as three seconds, from power ON. The EST is performed after the POST at the discretion of an operator, and includes a transmit test, a transducer element test, a front end voltage test and a receive test.

Claims

1. An ultrasonic imaging system comprising a power on self test (POST) which is initiated, performed and completed within three seconds of power ON.

2. An ultrasonic imaging system as in claim 1, wherein, after completion of the POST, further diagnostic tests are not required for the ultrasonic imaging system to perform ultrasonic scanning.

3. An ultrasonic imaging system as in claim 1, further comprising:

a first on-board memory storing run-time code; and

a second on-board memory having a faster access time than the first on-board memory, the run-time code being moved from the first on-board memory to the second on-board memory to perform ultrasonic scanning,

wherein the POST includes a verification test which copies the run-time code from the first on-board memory to the second on-board memory and verifies that the copied run-time code has been copied correctly.

4. An ultrasonic imaging system as in claim 3, further comprising:

a back-end application specific integrated circuit (ASIC) including registers to perform ultrasonic scanning, the POST including a register test to test the registers, the register test being initiated, performed and completed after completion of the verification test.

5. An ultrasonic imaging system as in claim 4, wherein the ultrasonic imaging system further comprises a controller generating a real-time clock and controlling input/output operations during ultrasonic scanning, the POST including a controller test testing operation of the controller, the controller test being initiated, performed and completed after completion of the register test.

6. An ultrasonic imaging system as in claim 5, wherein the POST includes a receive digital signal path test to test a receive digital signal path of the ultrasonic imaging system, the receive digital signal path test being initiated, performed and completed after completion of the controller test.

7. An ultrasonic imaging system as in claim 5, further comprising:

a beamformer; and

a detector, a receive digital signal path during ultrasonic scanning passing through the beamformer and then the detector,

wherein the POST includes a receive digital signal path test to test the receive digital signal path, the receive digital signal path test being initiated, performed and completed after completion of the controller test.

8. An ultrasonic imaging system as in claim 5, further comprising:

a first application specific integrated circuit (ASIC) including a beamformer and a built-in pseudo-random number (PRN) generator, and

a second application specific integrated circuit (ASIC) including a detector and a built-in cyclic redundancy coding (CRC) checker,

wherein a receive digital signal path during ultrasonic scanning passes through the beamformer and then the detector, the POST including a receive digital signal path test in which the PRN generator and the CRC checker operate together to test the receive digital signal path, the receive digital signal path test being initiated, performed and completed after completion of the controller test.

9. An ultrasonic imaging system as in claim 5, further comprising:

a beamformer;

a detector;

a pseudo-random number (PRN) generator, and

a cyclic redundancy coding (CRC) checker,

wherein a receive digital signal path during ultrasonic scanning passes through the beamformer and then the detector, the POST including a receive digital signal path test in which the PRN generator and the CRC checker operate together to test the receive digital signal path, the receive digital signal path test being initiated, performed and completed after completion of the controller test.

10. An ultrasonic imaging system as in claim 7, wherein the POST includes a basic front end test which is initiated, performed and completed after completion of the receive digital signal path test.

11. An ultrasonic imaging system as in claim 9, wherein the POST includes a basic front end test which is initiated, performed and completed after completion of the receive digital signal path test.

12. An ultrasonic imaging system as in claim 1, further comprising an extended self-test (EST) performed at the discretion of an operator after completion of the POST, the EST including at least one of the group consisting of a transmit test, a transducer element test, a front end voltage test and a receive test.

13. An ultrasonic imaging system as in claim 1, further comprising an extended self-test (EST) performed at the discretion of an operator after completion of the POST, the EST including a transmit test, a transducer element test, a front end voltage test and a receive test.

14. An ultrasonic imaging system as in claim 1, further comprising an extended self-test (EST) performed at the discretion of an operator after completion of the POST, the EST including

a transmit test,

a transducer element test which is initiated, performed and completed after completion of the transmit test,

a front end voltage test which is initiated, performed and completed after completion of the transducer element test, and

a receive test which is initiated, performed and completed after completion of the front end voltage test.

15. An ultrasonic imaging system comprising:

a first on-board memory storing run-time code;

a second on-board memory having a faster access time than the first on-board memory, the run-time code being moved from the first on-board memory to the second on-board memory to perform ultrasonic scanning; and

a power on self test (POST) including a verification test which copies the run-time code from the first on-board memory to the second on-board memory and verifies that the copied run-time code has been copied correctly.

16. An ultrasonic imaging system as in claim 15, further comprising:

a back-end application specific integrated circuit (ASIC) including registers to perform ultrasonic scanning, the POST including a register test to test the registers, the register test being initiated, performed and completed after completion of the verification test.

17. An ultrasonic imaging system as in claim 16, wherein the ultrasonic imaging system further comprises a controller generating a real-time clock and controlling input/output operations during ultrasonic scanning, the POST including a controller test testing operation of the controller, the controller test being initiated, performed and completed after completion of the register test.

18. An ultrasonic imaging system as in claim 17, wherein the POST includes a receive digital signal path test to test a receive digital signal path of the ultrasonic imaging system, the receive digital signal path test being initiated, performed and completed after completion of the controller test.

19. An ultrasonic imaging system as in claim 17, further comprising:

a beamformer;

a detector;

a pseudo-random number (PRN) generator; and

a cyclic redundancy coding (CRC) checker,

wherein a receive digital signal path during ultrasonic scanning passes through the beamformer and then the detector, the POST including a receive digital signal path test in which the PRN generator and the CRC checker operate together to test the receive digital signal path, the receive digital signal path test being initiated, performed and completed after completion of the controller test.

20. An ultrasonic imaging system as in claim 18, wherein the POST includes a basic front end test which is initiated, performed and completed after completion of the receive digital signal path test.

21. An ultrasonic imaging system comprising:

a power on self test (POST) including

a verification test copying run-time code from a first on-board memory to a second on-board memory and verifying that the copied run-time code has been copied correctly,

a register test testing registers included in an application specific integrated circuit (ASIC) for performing ultrasonic scanning,

a controller test testing operation of a controller which generates a real-time clock and controls input/output operations during ultrasonic scanning,

a receive digital signal path test testing a receive digital signal path of the ultrasonic imaging system, and

a basic front end test.

22. An ultrasonic imaging system as in claim 21, wherein the POST initiates, performs and completes within three seconds of power ON.

23. An ultrasonic imaging system as in claim 21, further comprising:

an extended self-test (EST) performed at the discretion of an operator after completion of the POST, the EST including at least one of the group consisting of a transmit test, a transducer element test, a front end voltage test and a receive test.

24. An ultrasonic imaging system as in claim 21, further comprising:

an extended self-test (EST) performed at the discretion of an operator after completion of the POST, the EST including a transmit test, a transducer element test, a front end voltage test and a receive test.

25. An ultrasonic imaging system as in claim 21, further comprising:

an extended self-test (EST) performed at the discretion of an operator after completion of the POST, the EST including

a transmit test,

a transducer element test which is initiated, performed and completed after completion of the transmit test,

a front end voltage test which is initiated, performed and completed after completion of the transducer element test, and

a receive test which is initiated, performed and completed after completion of the front end voltage test.

26. An ultrasonic imaging system comprising:

means for initiating, performing and completing a power on self test (POST) for the ultrasonic imaging system within three seconds of power ON; and

means for performing an extended self test (EST) after completion of the POST.

27. An ultrasonic imaging system comprising:

a power on self test (POST) which is initiated, performed and completed within three seconds of power ON, the POST including at least one of the group consisting of a verification test, a register test, a controller test, a receive digital signal path test and a basic front end test; and

an extended self-test (EST) performed at the discretion of an operator after completion of the POST, the EST including at least one of the group consisting of a transmit test, a transducer element test, a front end voltage test, and a receive test.