Voltage/current controller device, particularly for interleaving switching regulators

• US 20030034766A1
• Filed: 07/15/2002
• Published: 02/20/2003
• Est. Priority Date: 09/19/2000
• Status: Active Grant

• Current Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SRL (STMicroelectronics NV)
• Inventors: Zafarana, Alessandro, Castelli, Claudia
• Granted Patent: US 6,628,110 B2
• Time in Patent Office: Days
• US Class Current: 323/284
• CPC Class Codes: H02M 1/0009 Devices or circuits for detecting current in a converter
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

A voltage/current controller device, particularly for interleaving switching regulators, comprises: a DC/DC converter having a plurality of modules, with each module including a drive transistor pair connected in series between first and second supply voltage references, a current sensor connected to one transistor in the pair, and a current read circuit connected to the sensor. Advantageously, the read circuit comprises a transconductance amplifier connected across the current sensor to sense a voltage signal related to a load current being applied to each module, the transconductance amplifier reading the voltage signal with the transistor in the conducting state.

Claims

1. A voltage/current controller device, comprising:

a DC/DC converter having a plurality of modules, with each module including a drive transistor pair of first and second drive transistors connected in series between first and second supply voltage references, the DC/DC converter also including a current sensor connected to the first drive transistor in said pair, a current reading circuit connected to said sensor, and a controller connected to an output of the current reading circuit and structured to control the drive transistors of the module, said reading circuit including a transconductance amplifier connected across said current sensor to sense a voltage signal related to a load current being applied to each of said modules, said transconductance amplifier reading said voltage signal with said first drive transistor during a transition to a conducting state, the controller being structured to detect from the voltage signal whether the load current exceeds a current threshold, and if the sensed current exceeds the current threshold, then keep the first drive transistor in the conducting state until the sensed current falls back to the current threshold.

2. A controller device according to claim 1, wherein said transconductance amplifier is a track-and-hold type structured to interrupt reading said voltage signal during periods of instability in the working conditions of said DC/DC converter.

3. A controller device according to claim 1, wherein said transconductance amplifier generates an update signal (track) by combining a control signal of said one transistor and a clock signal to each module together through an AND logic operator.

4. A controller device according to claim 1, further comprising an error amplifier having an input terminal connected to said second supply voltage reference, and having an output terminal feedback-connected to another input terminal through a bias resistive element, said error amplifier outputting a triangular PWM signal.

5. A controller device according to claim 4, further comprising a plurality of PWM modulators connected to said output terminal of said error amplifier.

6. A controller device according to claim 5, further comprising a comparator structured to compare the reading by said reading circuit with a reference signal, thereby allowing the current to be checked at each reading cycle.

7. A controller device according to claim 4, wherein a sum of DC values of current readings by said reading circuit each is used for shifting a reference signal of a loop, containing said error amplifier, proportionally to an applied load to each module.

8. A controller device according to claim 4, wherein said DC/DC converter compares current information in each module with a mean value of the currents, thereby correcting a read control voltage of each module and any unbalance between modules, and equalizing the output current values.

9. A controller device according to claim 1, wherein said reading circuit has an output connected to a summing node, said summing node being also input an output voltage Vo(f) from each module and outputting a first order estimate of the load current of said DC/DC converter.

10. A controller device according to claim 9, wherein said summing node is connected to another summing node arranged to be input a reference signal, and that said another summing node is connected to said DC/DC converter through a series of an error amplifier and a PWM modulator.

11. A controller device according to claim 10, wherein said DC/DC converter processes the reading performed by said reading circuit to obtain an error amplifier output voltage in the frequency domain given as:

vc(f)=Zf/Zi*vo(f)−

Zf*k*Σ

i Rsense*li(f)

where;

vs(f) is a control voltage of said PWM modulator,

vo(f) is an output voltage of each module,

Zf is an output-to-inverting terminal impedance of said error amplifier,

Zi is an inverting terminal-to-output voltage impedance of said error amplifier, and

li(f) is a current sampling of said module.

12. A controller device according to claim 10, further comprising an additional compensation network connected between an output terminal of said DC/DC converter and an inverting terminal of said error amplifier to provide a stable DC/DC converter.

13. A voltage/current controller device, comprising:

a first drive transistor connected between a first supply voltage reference and an intermediate circuit node connected to a load;

a second drive transistor connected between the intermediate circuit node and a second supply voltage reference;

a track-and-hold transconductance amplifier connected to a selected one of the first and second drive transistors, the transconductance amplifier being structured to sense a current though the selected drive transistor during a conducting state of the selected drive transistor; and

a controller coupled to an output of the transconductance amplifier, the controller being structured to keep the selected drive transistor in the conducting state in response to detecting that the sensed current has exceeded a current threshold, and drive the first and second drive transistors with pulse width modulated signal in response to the sensed current falling below the current threshold.

14. The controller device of claim 13, further comprising an error amplifier having a first input terminal connected to said second supply voltage reference and an output terminal connected to an output of the transconductance amplifier through a bias resistive element.

15. The controller device of claim 14 wherein the error amplifier includes a second input terminal feedback-connected to the output terminal by the bias resistive element.

16. The controller device of claim 14, wherein the controller includes a PWM modulator having an input connected to the output terminal of the error amplifier and an output connected to a DC/DC converter that includes the first and second drive transistors.

17. The controller device of claim 13, wherein the first and second drive transitors comprise a first DC/DC converter module, the controller device further comprising:

a second DC/DC converter module; and

a summing node having a first input connected to an output of the transconductive amplifier, a second input connected to receive an output voltage Vo(f) from each module, and an output that provides a first order estimate of a load current of the first DC/DC converter module.

18. A method of controlling a current imparted to a load using a controller device that includes first and second drive transistors connected between a first and second supply voltage references, the first and second drive transistors being connected to each other at an intermediate circuit node connected to the load, the method comprising:

sensing a current through the first drive transistor during a transition to a conducting state of the first drive transistor;

detecting whether the sensed current exceeds a current threshold;

if the sensed current exceeds the current threshold, then keeping the first drive transistor in the conducting state until the sensed current falls back to the current threshold; and

turning on the second drive transistor in response to detecting that the sensed current has fallen back to the current threshold.

19. The method of claim 18, further comprising:

sensing the current through the first drive transistor during the conducting state of the first drive transistor;

stopping the sensing of the current prior to a conducting state of the second drive transistor;

holding a value of the sensed current during the conducting state of the second drive transistor; and

adjusting duty cycles of the first and second drive transistors based on the held value of the sensed current.