Semiconductor integrated circuit
First Claim
1. In a semiconductor integrated circuit comprising a first circuit which outputs n (n is an integer of 2 or more) clock signals CKi (i is an integer of 1 to n) each delayed by a delay time of i×
- T (T is a constant time) from a reference signal, and a second circuit which carries out signal processing using said n clock signals from the first circuit via n signal wirings, wherein, for at least a part of said n signal wirings, the positions of edges of two of said clock signals transmitted on adjacent two of said signal wirings as seen on the time base are separated in time larger than the time T.
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Accused Products
Abstract
In a semiconductor integrated circuit having a first circuit which outputs n (n is an integer of 2 or more) clock signals CKi (i is an integer of 1 to n) each of which is delayed by a delay time of i×T (T is a constant time) from a reference signal, and a second circuit which carries out signal processing using n clock signals input from the first circuit via n signal wirings, for at least a part of the n signal wirings, the positions of the edges of two clock signals transmitted on the two adjacent signal wirings are separated, as seen on the time base, by more than T in the time.
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Citations
6 Claims
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1. In a semiconductor integrated circuit comprising a first circuit which outputs n (n is an integer of 2 or more) clock signals CKi (i is an integer of 1 to n) each delayed by a delay time of i×
- T (T is a constant time) from a reference signal, and a second circuit which carries out signal processing using said n clock signals from the first circuit via n signal wirings, wherein, for at least a part of said n signal wirings, the positions of edges of two of said clock signals transmitted on adjacent two of said signal wirings as seen on the time base are separated in time larger than the time T.
- View Dependent Claims (2, 3, 4, 5, 6)
Specification