Trench DMOS transistor with embedded trench schottky rectifier
First Claim
1. A merged device comprising:
- a plurality of MOSFET cells that comprise;
(a) a source region of first conductivity type formed within an upper portion of a semiconductor region, (b) a body region of second conductivity type formed within a middle portion of said semiconductor region, (c) a drain region of first conductivity type formed within a lower portion of said semiconductor region, and (d) a gate region provided adjacent said source region, said body region, and said drain region; and
a plurality of Schottky diode cells disposed within a trench network, which comprise a conductor portion in Schottky rectifying contact with said lower portion of said semiconductor region;
wherein at least one gate region of said plurality of MOSFET cells is positioned along a sidewall of said trench network adjacent at least one Schottky diode cell.
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Accused Products
Abstract
A merged device is that comprises a plurality of MOSFET cells and a plurality of Schottky rectifier cells, as well as a method of designing and making the same. According to an embodiment of the invention, the MOSFET cells comprise: (a) a source region of first conductivity type formed within an upper portion of a semiconductor region, (b) a body region of second conductivity type formed within a middle portion of the semiconductor region, (c) a drain region of first conductivity type formed within a lower portion of the semiconductor region, and (d) a gate region provided adjacent the source region, the body region, and the drain region. The Schottky diode cells in this embodiment are disposed within a trench network and comprise a conductor portion in Schottky rectifying contact with the lower portion of the semiconductor region. At least one MOSFET cell gate region is positioned along a sidewall of the trench network and adjacent at least one Schottky diode cell in this embodiment.
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Citations
27 Claims
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1. A merged device comprising:
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a plurality of MOSFET cells that comprise;
(a) a source region of first conductivity type formed within an upper portion of a semiconductor region, (b) a body region of second conductivity type formed within a middle portion of said semiconductor region, (c) a drain region of first conductivity type formed within a lower portion of said semiconductor region, and (d) a gate region provided adjacent said source region, said body region, and said drain region; and
a plurality of Schottky diode cells disposed within a trench network, which comprise a conductor portion in Schottky rectifying contact with said lower portion of said semiconductor region;
wherein at least one gate region of said plurality of MOSFET cells is positioned along a sidewall of said trench network adjacent at least one Schottky diode cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A merged device comprising:
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a semiconductor substrate of first conductivity type;
a semiconductor epitaxial layer disposed over said substrate;
a trench network extending into said epitaxial region from an upper surface of said epitaxial layer and forming a plurality of mesas within said device;
a plurality of MOSFET cells that comprise;
(a) a source region of said first conductivity type disposed within one of said mesas, (b) a body region of second conductivity type disposed within said one of said mesas, said body region forming a junction with said source region, (c) a drain region of first conductivity type at least partially disposed within said one of said mesas, said drain region forming a junction with said body region; and
(d) a gate region situated within said trench network such that it is adjacent said source region, said body region and said drain region, said gate region comprising (i) an insulating region lining at least a portion of said trench network and (ii) a conductive region within said trench network adjacent said insulating region, said conductive region being separated from said source, body and drain regions by said insulating region; and
a plurality of Schottky dioide cells formed over bottom portions of said trench network, which Schottky dioide cells comprise a conductor portion that is in Schottky barrier rectifying contact with said epitaxial layer, wherein at least some of said gate regions of said MOSFET cells are positioned along sidewalls of said trench network adjacent said conductor portions of at least some of said Schottky diodes. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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24. A merged device comprising Schottky diode cells and MOSFET cells, wherein
said Schottky diode cells are located at the bottom of a trench network, and wherein certain gate regions of said MOSFET cells are provided on sidewalls of said trench network.
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25. A method of forming a merged device comprising:
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forming a plurality of Schottky diode cells; and
forming a plurality of MOSFET cells, wherein said Schottky diode cells are located at the bottom of a trench network, wherein gate regions of said MOSFET cells comprise a conductive region and an insulating region, wherein certain of said gate regions are provided on sidewalls of said trench network, and wherein said conductive regions of said gate regions are formed without the aid of a masking layer. - View Dependent Claims (26)
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27. A method of providing a design for a merged device that comprises a plurality of Schottky diode cells and a plurality of MOSFET cells, said method comprising:
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removing one or more source/body mesas within a trench MOSFET device design; and
locating one or more Schottky diode cells where the removed mesa was formerly located.
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Specification