Reconstructing memory resident queues of an inactive processor
First Claim
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1. A method of switching queue ownership, said method comprising:
- obtaining an indication that a queue is to be taken over, said queue being resident in memory of a first processor; and
moving said queue from said first processor to a second processor, said queue to be resident in memory of said second processor.
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Abstract
When a processor becomes inactive, queues resident in the memory of that processor become inaccessible. Thus, in order to access those queues, an active processor takes over ownership of one or more of the inaccessible queues. Each queue may be rebuilt prior to its take over to ensure that it has up-to-date information.
16 Citations
64 Claims
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1. A method of switching queue ownership, said method comprising:
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obtaining an indication that a queue is to be taken over, said queue being resident in memory of a first processor; and
moving said queue from said first processor to a second processor, said queue to be resident in memory of said second processor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method of reconstructing queues, said method comprising:
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rebuilding contents of a queue to obtain an updated version of the queue, said queue being a memory resident queue of a first processor; and
reading at least a portion of the updated version of the queue into memory of a second processor, said second processor being different than said first processor. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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21. A system of switching queue ownership, said system comprising:
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means for obtaining an indication that a queue is to be taken over, said queue being resident in memory of a first processor; and
means for moving said queue from said first processor to a second processor, said queue to be resident in memory of said second processor. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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34. A system of reconstructing queues, said system comprising:
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means for rebuilding contents of a queue to obtain an updated version of the queue, said queue being a memory resident queue of a first processor; and
means for reading at least a portion of the updated version of the queue into memory of a second processor, said second processor being different than said first processor. - View Dependent Claims (35, 36, 37, 38, 39, 40)
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41. A system of switching queue ownership, said system comprising:
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a queue resident in memory of a first processor; and
at least a second processor adapted to move said queue from said first processor to the second processor, said queue to be resident in memory of said second processor.
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42. A system of reconstructing queues, said system comprising:
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a first processor adapted to rebuild contents of a queue to obtain an updated version of the queue, said queue being a memory resident queue of a second processor; and
a third processor adapted to read at least a portion of the updated version of the queue into memory of the third processor, said third processor being different than said second processor. - View Dependent Claims (43, 44)
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45. At least one program storage device readable by a machine, tangibly embodying at least one program of instructions executable by the machine to perform a method of switching queue ownership, said method comprising:
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obtaining an indication that a queue is to be taken over, said queue being resident in memory of a first processor; and
moving said queue from said first processor to a second processor, said queue to be resident in memory of said second processor. - View Dependent Claims (46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57)
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58. At least one program storage device readable by a machine, tangibly embodying at least one program of instructions executable by the machine to perform a method of reconstructing queues, said method comprising:
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rebuilding contents of a queue to obtain an updated version of the queue, said queue being a memory resident queue of a first processor; and
reading at least a portion of the updated version of the queue into memory of a second processor, said second processor being different than said first processor. - View Dependent Claims (59, 60, 61, 62, 63, 64)
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Specification