Package with integrated inductor and/or capacitor

• US 20030045044A1
• Filed: 08/28/2002
• Published: 03/06/2003
• Est. Priority Date: 08/29/2001
• Status: Active Grant

• Current Assignee: Honeywell International Inc.
• Original Assignee: Honeywell International Inc.
• Inventors: Dentry, James F., Peczalski, Andrezej
• Granted Patent: US 6,744,114 B2
• Time in Patent Office: Days
• US Class Current: 438/200
• CPC Class Codes: H01L 21/50 Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
• CPC Class Codes: H01L 2223/6672 for integrated passive components, e.g. semiconductor device with passive components only
• CPC Class Codes: H01L 2223/6677 for antenna, e.g. antenna included within housing of semiconductor device
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 25/16 the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
• CPC Class Codes: H01L 25/50 Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00 H01L21/50 takes precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/3011 Impedance

Abstract

Methods for attaching two wafers are presented along with devices resulting from such methods. In one illustrative embodiment, a first wafer is provided having pillars for conducting an electric signal. The wafer also includes an electronic device such as an inductor or capacitor that may in some instances consume relatively large amounts of space. The first wafer is bonded to a second wafer so that a circuit on the second wafer may be electrically connected to the electronic device of the first wafer.

Claims

1. A method of attaching two wafers, the method comprising:

providing a first wafer having a first side and a second side;

providing a second wafer having a first side and a second side;

creating at least one pit into the first side of the second wafer to define a pillar;

adapting the pillar to conduct an electric signal;

providing a contact pad on a first side of the first wafer;

aligning the first wafer and the second wafer such that the pillar corresponds to the contact pad;

attaching the first wafer to the second wafer.

2. The method of claim 1 further including providing an electronic component on the second wafer.

3. The method of claim 2 wherein the electronic component includes an inductor.

4. The method of claim 3 wherein the inductor is provided on the first side of the second wafer.

5. The method of claim 3 wherein the inductor is provided on the second side of the second wafer.

6. The method of claim 3 wherein the inductor is integral to the second wafer.

7. The method of claim 2 wherein the electronic component includes a capacitor.

8. The method of claim 2 wherein the electronic component includes a transformer.

9. The method of claim 2 wherein the electronic component includes a transistor.

10. The method of claim 2 wherein the electronic component includes an optical device.

11. The method of claim 10 wherein the optical device is adapted to receive an optical signal.

12. The method of claim 10 wherein the optical device is adapted to produce an optical signal.

13. The method of claim 2 wherein the electronic component is an antenna.

14. The method of claim 1 wherein the step of attaching the first wafer to the second wafer includes causing an area of solder provided on at least one of the first wafer and the second wafer to reflow.

15. The method of claim 1 wherein the step of adapting the pillar to conduct an electric signal includes doping an area of the pillar.

16. The method of claim 1 wherein the step of adapting the pillar to conduct an electric signal includes depositing a conductive material on the pillar.

17. The method of claim 1 further including the step of providing a slanted side on the pillar, the slanted side being adapted for receiving a deposited conductive material.

18. The method of claim 1 wherein the step of attaching the first wafer to the second wafer includes creating a sealed chamber between the first wafer and the second wafer.

19. The method of claim 1 wherein the step of attaching the first wafer to the second wafer includes adhering the first wafer to the second wafer using a method chosen from the group consisting of soldering, glass frit, anodic bonding, fusion bonding, photoresist adhesion, polymethyl methacrylate bonding, wax bonding, low temperature glass melt, and bonding using an applied adhesive.

20. A device comprising:

a first wafer having a first side and a second side, the first wafer including an electronic component and an electrically conductive element;

a second wafer having a first side and a second side, the first side of the second wafer including at least one pit that defines at least one pillar, at least part of the pillar being adapted to be electrically conductive, wherein the second wafer includes an electronic device that is electrically coupled to the at least part of the pillar that is electrically conductive;

wherein the first wafer is attached to the second wafer such that the at least part of the pillar that is electrically conductive is electrically coupled to the electrically conductive element.

21. The device of claim 20 wherein the at least part of the pillar that is adapted to be electrically conductive includes a metallization layer over a portion of the pillar.

22. The device of claim 20 wherein the at least part of the pillar that is adapted to be electrically conductive includes a doped region of the pillar.

23. The device of claim 20 wherein the electronic device is disposed adjacent to the second side of the second wafer.

24. The device of claim 20 wherein the electronic device is disposed adjacent to the first side of the second wafer.

25. The device of claim 20 wherein the electronic device is integral to the second wafer.

26. The device of claim 20 wherein the electronic device is an inductor.

27. The device of claim 20 wherein the electronic device is a capacitor.

28. The device of claim 20 wherein the electronic device is a transistor.

29. The device of claim 20 wherein the at least part of the pillar that is adapted to be electrically conductive provides an electronic connection between the electronic device and the electrically conductive element.

30. A method comprising:

providing a first wafer having a first side and a second side;

providing a second wafer having a first side and a second side;

creating at least one pit into the first side of the second wafer to define a first pillar and a second pillar;

adapting the first pillar to conduct an electrical signal;

adapting the second pillar to conduct an electrical signal;

providing an electronic device having a first lead and a second lead, the first lead coupled to the first pillar and the second lead coupled to the second pillar;

providing a first contact pad and a second contact pad on a first side of the first wafer;

aligning the first wafer and the second wafer such that the first pillar corresponds to the first contact pad and the second pillar corresponds to the second contact pad;

attaching the first wafer to the second wafer.

31. A device comprising:

a first wafer including a pillar formed by removing a portion of the first wafer, a first electronic device, and a perimeter;

a second wafer having a second electronic device and a perimeter, the second wafer bonded to the first wafer;

means for conducting an electronic signal from the first electronic device to the second electronic device, the means for conducting engaged with the pillar and wholly within the perimeters of both the first wafer and the second wafer.

32. A method comprising:

providing a first wafer having a first side and a second side;

providing a second wafer having a first side and a second side;

creating at least one pit into the first side of the second wafer to define a pillar;

adapting a first region of the pillar to conduct an electrical signal;

adapting a second region of the pillar to conduct an electrical signal, the second region not overlapping the first region;

providing an electronic device having a first lead and a second lead, the first lead coupled to the first region of the pillar and the second lead coupled to the second region of the pillar;

providing a first contact pad and a second contact pad on a first side of the first wafer; and

attaching the first wafer to the second wafer such that the first region of the pillar is electrically connected to the first contact pad and the second region of the pillar is electrically connected to the second contact pad.

33. A method comprising:

providing a first wafer with the circuit, the circuit including a first contact pad and a second contact pad;

providing a second wafer having a first side and a second side;

removing portions of the first side of the second wafer to define a pillar;

adapting a first region of the pillar to be electrically conductive;

adapting a second region of the pillar to be electrically conductive, the second region separate from the first region;

applying a metallization layer to the first side of the pillar, the metallization layer defining an inductive element having a first lead and a second lead;

providing an electrical connection between the first lead and the first region;

providing an electrical connection between the second lead and the second region;

attaching the first side of the second wafer to the first wafer such than an electrical connection between the first region and the first contact pad is created and an electrical connection between the second region and the second contact pad is created.

34. The method of claim 33 wherein the step of providing an electrical connection between the second lead and the second region includes the steps of:

providing a conductive element along the second side of the second wafer;

placing a first via from the first side of the second wafer to the second side of the second wafer, the first via providing an electrical connection between the second lead and the conductive element;

placing a second via from the first side of the second wafer to the second side of the second wafer, the second via providing an electrical connection between the second region and the conductive element.

35. The method of claim 33 wherein the step of providing an electrical connection between the second lead and the second region includes the steps of:

applying a dielectric layer over a portion of the metallization layer corresponding to a region of the inductive element; and

providing a conductive element from the second lead to the second region over the dielectric layer.

36. A device comprising:

a wafer having a first side and a second side, the first side having an area removed to form a pit, the pit defining a pillar;

a first electrically conductive means engaging a first region of the pillar;

a second electrically conductive means engaging a second region of the pillar, wherein there is a discontinuity between the first region and the second region; and

an electronic device engaged with the wafer, the electronic device having a first lead electrically coupled to the first electrically conductive means and a second lead electrically coupled to the second electrically conductive means.

37. The device of claim 36 wherein the electronic device is engaged with the second side of the wafer.

38. The device of claim 36 wherein the electronic device is engaged with the first side of the wafer within the pit.

39. The device of claim 36 wherein the electronic device is an inductor formed by deposition of metal within the pit.

40. The device of claim 36 wherein the electronic device includes a capacitor, the capacitor including:

a first layer of metal electrically coupled to the first conductive means;

a second layer of metal electrically coupled to the second conductive means; and

a dielectric separating the first layer of metal from the second layer of metal.

41. A device comprising:

a wafer having a first side and a second side with an area of the first side removed to form a pit defining a first pillar and a second pillar;

electrically conductive means engaged with a region of the first pillar;

electrically conductive means engaged with a region of the second pillar; and

metal deposited within the pit, the metal formed to define a first portion and a second portion, the first portion and second portion electrically isolated from one another by a layer of dielectric; and

wherein the first portion is electrically coupled to the first electrically conductive means and the second portion is electrically coupled to the second electrically conductive means, the metal and the dielectric adapted to form a capacitor.

42. The device of claim 41 wherein the metal is formed such that the first portion and the second portion define an interleaving comb structure defining a channel therebetween, the channel including at least some of the dielectric.

43. The device of claim 41 wherein the capacitor formed by the metal and the dielectric is fabricated and then placed within the pit.

44. The device of claim 41 wherein the metal and the dielectric are assembled within the pit to form the capacitor.