Integrated direct conversion satellite tuner

• US 20030045263A1
• Filed: 11/29/2001
• Published: 03/06/2003
• Est. Priority Date: 11/29/2000
• Status: Active Grant

• Current Assignee: Afshin Mellati, Chun-Ying Chen, Dana V. Laub, David S. Ho, Frank Carr, Hsiang-Bin Lee, Iconomos A. Koullias, James Y. Chang, Lawrence M. Burns, Luke T. Steigerwald, Myles Wakayama, Patrick Pai, Ron Lipka, Young J. Shin
• Original Assignee: Afshin Mellati, Chun-Ying Chen, Dana V. Laub, David S. Ho, Frank Carr, Hsiang-Bin Lee, Iconomos A. Koullias, James Y. Chang, Lawrence M. Burns, Luke T. Steigerwald, Myles Wakayama, Patrick Pai, Ron Lipka, Young J. Shin
• Inventors: Pai, Patrick, Koullias, Iconomos A., Lipka, Ron, Chang, James Y., Laub, Dana V., Steigerwald, Luke T., Ho, David S., Wakayama, Myles, Carr, Frank, Mellati, Afshin, Chen, Chun-Ying, Burns, Lawrence M., Lee, Hsiang-Bin, Shin, Young J.
• Granted Patent: US 7,139,547 B2
• Time in Patent Office: Days
• US Class Current: 455/323
• CPC Class Codes: H03D 2200/0025 Gain control circuits
• CPC Class Codes: H03D 2200/0043 Bias and operating point
• CPC Class Codes: H03D 2200/0047 Offset of DC voltage or frequency
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H03D 7/1441 using field-effect transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H03D 7/1483 comprising components for selecting a particular frequency component of the output
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H03H 11/04 Frequency selective two-port networks
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

A direct conversion satellite tuner is fully integrated on a common substrate. The integrated tuner receives an RF signal having a plurality of channels and down-converts a selected channel directly to baseband for further processing. The integrated tuner includes on-chip local oscillator generation, tunable baseband filters, and DC Offset cancellation. The integrated tuner can be implemented in a completely differential I/Q configuration for improved electrical performance. The entire direct conversion satellite tuner can be fabricated on a single semiconductor substrate using standard CMOS processing, with minimal off-chip components. The tuner configuration described herein is not limited to processing TV signals, and can be utilized to down-convert other RF signals to an IF frequency or baseband.

Claims

1. An integrated tuner, comprising:

a substrate;

a signal input on said substrate;

a local oscillator (LO) generation circuit, disposed on said substrate, that is configured to generate a differential local oscillator signal;

a differential direct conversion mixer, disposed on said substrate, and coupled to said signal input and said differential LO oscillator signal; and

a differential tunable lowpass filter, disposed on said substrate, and coupled to an output said differential direct conversion mixer.

2. The integrated tuner of claim 1, wherein said LO generation circuit comprises a plurality of voltage controlled oscillators (VCOs), each of said VCOs configured to generate said differential local oscillator signal over a different frequency band.

3. The integrated tuner of claim 2, wherein one of said VCOs is selected to provide said differential local oscillator signal based on a desired frequency for said differential local oscillator signal.

4. The integrated tuner of claim 2, wherein said LO generation circuit further comprises a plurality of polyphase circuits that correspond to said plurality of VCOs, each polyphase circuit configured to generate in-phase (I) and quadrature (Q) differential local oscillator signals based on an output of a corresponding VCO.

5. The integrated tuner of claim 4, wherein one of said plurality of VCOs and one of said polyphase circuits are selected based on said desired frequency for said differential local oscillator signal.

6. The integrated tuner of claim 4, wherein said plurality of VCOs are connected to said plurality of said polyphase circuits by a plurality of amplifiers, wherein a VCO is selected by enabling one or more of said amplifiers that correspond to said selected VCO, and disabling more one or more amplifiers that do not correspond to said selected VCO.

7. The integrated tuner of claim 1, further comprising a LO correction circuit that is configured to adjust an amplitude level of said differential LO oscillator signal to improve performance of said a differential direct conversion mixer.

8. The integrated tuner of claim 7, wherein said LO correction circuit comprises:

a variable amplifier that variably amplifies said differential local oscillator signal according to a control signal;

a level detect circuit, connected to the output of said variable amplifier, that generates said control signal based on an output level of said variable amplifier.

9. The integrated tuner of claim 8, wherein said variable amplifier includes a field effect transistor (FET), wherein said control signal controls a current of said FET, and thereby a gain of said variable amplifier.

10. The integrated tuner of claim 1, wherein said differential direct conversion mixer include an in-phase (I) mixer and a quadrature (Q) mixer.

11. The integrated tuner of claim 1, wherein said differential direct conversion mixer includes:

an RF transconductance circuit that is configured to convert a differential signal received at said signal input to a differential current; and

a LO switching circuit configured to switch said differential signal between outputs of said differential direct conversion mixer at a rate determined by said differential LO signal.

12. The integrated tuner of claim 11, wherein said RF transconductance circuit includes a pair of field effect transistors to convert said differential signal to said differential current, said differential direct conversion mixer further comprising a means for adding DC current to said pair of transistors to minimize flicker noise.

13. The integrated tuner of claim 1, further comprising a differential lowpass filter coupled between an output of said differential direct conversion mixer and an input to said differential tunable lowpass filter.

14. The integrated tuner of claim 13, wherein a cutoff frequency of said differential lowpass filter is substantially fixed and selected to remove a sum frequency that is generated by said differential direct conversion mixer.

15. The integrated tuner of claim 1, wherein said signal input receives a radio frequency signal having a plurality of channels.

16. The integrated tuner of claim 15, wherein said plurality of channels occupy a frequency range from approximately 950 MHZ to 2150 MHz.

17. The integrated tuner of claim 1, wherein said differential tunable lowpass filter includes a plurality of integrators, each integrator having a resistor and a capacitor, wherein a cutoff frequency of said differential tunable lowpass filter is tuned by adjusting at least one of said resistor or said capacitor in said integrators.

18. The integrated tuner of claim 17, wherein said capacitor is fixed and said cutoff frequency is tuned by adjusting a value of said resistor.

19. The integrated tuner of claim 18, wherein said resistor is a bank of parallel resistors having corresponding series-connected switches, so that said cutoff frequency is tuned by controlling said series-connected switches.

20. The integrated tuner of claim 19, wherein said bank of parallel resistors have corresponding values that are binarily weighted relative to each other, and thereby said cutoff frequency is adjustable in fixed increments.

21. The integrated tuner of claim 18, wherein said capacitor is a metal oxide semiconductor capacitor (MOSCAP).

22. The integrated tuner of claim 21, further comprising a level shifter circuit between a pair of adjacent integrators, wherein said level shifter circuit is configured to level shift a first DC voltage to a second DC voltage, wherein said first DC voltage applied to a first capacitor in a first integrator of said pair of integrators, and said second DC voltage is applied to a second capacitor in said second integrators.

23. The integrated tuner of claim 1, further comprising a first baseband amplifier connected between said differential direct conversion mixer and said tunable differential lowpass filter, and a second baseband amplifier connected to an output of said tunable differential lowpass filter.

24. The integrated tuner of claim 23, further comprising:

a means for detecting a DC offset voltage at an output of said second amplifier; and

a means for canceling said DC offset voltage at an output of said first amplifier.

25. The integrated tuner of claim 24, wherein said means for canceling comprises:

means for converting said DC offset voltage to a corresponding differential current; and

means for combining said differential current out-of-phase with a differential current at an output of said first amplifier.

26. The integrated tuner of claim 23, further comprising a DC servo circuit, disposed on said substrate, and configured to detect a DC offset at an output of said second baseband amplifier and cancel said DC offset at an output of said first amplifier.

27. The integrated tuner of claim 26, wherein said DC servo circuit includes:

a first transconductance amplifier connected to an output of said second baseband amplifier;

a lowpass filter connected to an output of said first transconductance amplifier;

a second transconductance amplifier connected to an output of said lowpass filter, an output of said second transconductance amplifier connected 180 degrees out-of-phase with an output of a third transconductance amplifier, said third transconductance amplifier part of said first baseband amplifier.

28. The integrated tuner of claim 27, wherein said lowpass filter has a cutoff frequency that rejects baseband information but passes said DC offset.

41. The integrated tuner of claim 15, wherein said plurality of channels occupy a frequency range from approximately 950 MHZ to 1450 MHz.

29. An integrated tuner, comprising:

a substrate;

a signal input, disposed on said substrate, capable of receiving a RF signal having a plurality of channels;

a local oscillator (LO) generation circuit, disposed on said substrate, configured to generate in-phase (I) and quadrature (Q) LO signals;

an I/Q mixer, disposed on said substrate and coupled to said signal input and said LO generation circuit, said differential I/Q mixer configured to down-convert a selected channel in said plurality of channels directly to baseband, said selected channel determined by a frequency of said I and Q LO signals;

a first tunable lowpass filter, disposed on said substrate, and coupled to an I output of said I/Q mixer; and

a second tunable lowpass filter, disposed on said substrate, coupled to a Q output of said I/Q mixer.

30. The integrated tuner of claim 29, further comprising a means for tuning a first cutoff frequency of said first tunable lowpass filter and a second cutoff frequency of said second tunable lowpass filter, said means for tuning disposed on said substrate.

31. The integrated tuner of claim 30, wherein said means for tuning comprises a first variable resistor in said first differential tunable lowpass filter, and a second variable resistor in said second differential tunable lowpass filter.

32. The integrated tuner of claim 29, wherein said RF signal, and said I and Q LO signals are all differential signals, wherein said I/Q mixer has differential inputs and outputs, wherein said first tunable lowpass filter and said second tunable lowpass filter has differential inputs and outputs.

33. The integrated tuner of claim 29, further comprising a means for adjusting a frequency of said I and Q LO signals, to thereby change said selected channel that is down-converted to baseband.

34. The integrated tuner of claim 29, further comprising:

a first variable gain amplifier (VGA) coupled between an I output of said I/Q mixer and said first tunable lowpass filter;

a second variable gain amplifier (VGA) coupled between an Q output of said I/Q mixer and said second tunable lowpass filter;

a first buffer amplifier coupled to an output of said first VGA; and

a second buffer amplifier coupled to an output of said second VGA.

35. The integrated tuner of claim 29, further comprising:

a first DC servo circuit configured to detect a DC offset voltage at an output of said first buffer amplifier and cancel said DC offset at an output of said first VGA; and

a second DC servo circuit configured to detect a DC offset voltage at an output of said second buffer amplifier and cancel said DC offset at an output of said second VGA.

36. The integrated tuner of claim 30, wherein said first DC servo circuit includes:

means for converting said DC offset voltage at an output of said first buffer amplifier to a DC offset current;

means for combining said DC offset current approximately 180 degrees out-of-phase with a current in said VGA.

37. A method of processing an RF signal having a plurality of channels, the method comprising the steps of:

(1) generating a differential local oscillator signal on a common substrate;

(2) mixing the received RF signal with said differential local oscillator signal on said common substrate, a frequency of said local oscillator signal determined so that a selected channel of said plurality of channels is down-converted directly to baseband during said mixing step to produce a differential baseband signal; and

(3) filtering said differential baseband signal in a differential tunable filter on said common substrate, to remove unwanted frequencies above a cutoff frequency, to produce a filtered baseband signal.

38. The method of claim 37, further comprising the step of adjusting the level of said differential local oscillator signal to improve performance of step (2).

39. The method of claim 37, further comprising the step of tuning an cutoff frequency of said differential tunable baseband filter.

40. The method of claim 37, further comprising steps of:

detecting a DC offset in said differential baseband signal; and

canceling said DC offset prior to step (3).