Drive circuit device for display device, and display device using the same

• US 20030048249A1
• Filed: 03/20/2002
• Published: 03/13/2003
• Est. Priority Date: 09/12/2001
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Fujitsu Limited
• Inventors: Furukoshi, Yasutake, Sekido, Satoshi, Fukutoku, Syouichi
• Granted Patent: US 7,245,281 B2
• Time in Patent Office: Days
• US Class Current: 345/98
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/06 Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A drive circuit device for a display device which drives a plurality of source bus lines provided on a display panel, the drive circuit device comprises: a driver unit(20) that receives a clock signal, a data signal and a control signal, and sequentially fetches the data signal, and generates drive signals for the source bus lines in accordance to the fetched data signal; and a gate unit(22) that, after elapse of specified time from the reception of the driver unit, and at a timing when a rear-stage drive circuit device starts receiving, starts outputting of a propagation signal including at least one of the clock signal, data signal and control signal to the rear-stage drive circuit device. Consequently, the power consumption required for supplying these signals and the generated amount of electromagnetic waves resulting from the signal supply can be suppressed.

Claims

1. A drive circuit device for a display device which drives a plurality of bus lines disposed on a display panel, the drive circuit device comprising:

a driver unit that receives a propagation signal including at least one of a clock signal and a control signal, and generates a drive signal for the bus lines; and

a gate unit that, at the timing when a rear-stage drive circuit device starts receiving the propagation signal, after elapse of predetermined time from the reception of the driver unit, starts outputting of the propagation signal to the rear-stage drive circuit device.

14. A display device having a plurality of drive circuit devices according to any one of claims 1, 2, or 8 that are connected in tandem, the display device comprising:

a display panel to which the plurality of drive circuit devices are connected, the display panel being provided with a plurality of source bus lines and a plurality of gate bus lines that intersect the source bus lines.

2. A drive circuit device for a display device which drives a plurality of source bus lines disposed on a display panel, the drive circuit device comprising:

a driver unit that receives a clock signal, a data signal and a control signal, and sequentially fetches the data signal to generate a drive signal for the source bus lines in accordance to the fetched data signal; and

a gate unit that, at the timing when a rear-stage drive circuit device starts receiving a propagation signal including at least one of the clock signal, data signal and control signal, after elapse of predetermined time from the reception of the driver unit, starts outputting of the propagation signal to the rear-stage drive circuit device.

3. The drive circuit device according to claim 2, wherein

the control signal includes an invert control signal indicative of “

invert”

, or “

non-invert”

of the data signal.

4. The drive circuit device according to claim 2, wherein

the driver device receives an input cascade signal to control the start of fetch of the data signal, and outputs an output cascade signal to control the fetch of the data signal at the rear stage, after the completion of fetching of the data signal.

5. The drive circuit device according to claim 4, further comprising:

a gate control circuit that inputs the input cascade signal and clock signal, and generates a gate control signal to control the gate unit to start outputting of the propagation signal.

6. The drive circuit device according to claim 4, wherein

the gate unit starts outputting of the propagation signal, in response to the output cascade signal.

7. The drive circuit device according to claim 4, further comprising:

a data register to fetch and hold the data signal at the timing of the clock signal, in response to the input cascade signal.

8. A drive circuit device for a display device which sequentially drives a plurality of gate bus lines disposed on a display panel, the drive circuit device comprising:

a driver unit that receives a clock signal and a control signal, and sequentially generates drive signals for the gate bus lines, in synchronism with the clock signal; and

a gate unit that, at the timing when a rear-stage drive circuit device starts receiving a propagation signal including at least one of the clock signal and control signal, after the elapse of predetermined time from the reception of the driver unit, starts outputting of the propagation signal to the rear-stage drive circuit device.

9. The drive circuit device according to claim 8, wherein

the control signal includes an output enable signal to control the outputting period of the drive signal generated by the driver unit.

10. The drive circuit device according to claim 8, wherein

the drive circuit device receives an input cascade signal to control the start of fetching of the clock signal, and outputs an output cascade signal to control the fetching of the clock signal at the rear stage, after the completion of generation of the drive signals for the gate bus lines.

11. The drive circuit device according to claim 10, further comprising:

a gate control circuit which inputs the input cascade signal and the clock signal, and generates a gate control signal to control the gate unit to start outputting of the propagation signal.

12. The drive circuit device according to claim 10, wherein

the gate unit starts outputting of the propagation signal, in response to the output cascade signal.

13. The drive circuit device according to claim 10, further comprising:

a gate drive signal generator circuit to generate the drive signals at the timing of the clock signal, in response to the input cascade signal.