Power semiconductor rectifier with ring-shaped trenches

• US 20030052383A1
• Filed: 08/02/2002
• Published: 03/20/2003
• Est. Priority Date: 08/02/2001
• Status: Active Grant

• Current Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Original Assignee: Fuji Electric Company Limited (Fuji Electric Systems Company Limited)
• Inventors: Naito, Tatsuya, Nemoto, Michio, Otsuki, Masahito, Kirisawa, Mitsuaki
• Granted Patent: US 6,670,650 B2
• Time in Patent Office: Days
• US Class Current: 257/471
• CPC Class Codes: H01L 29/861 Diodes
• CPC Class Codes: H01L 29/872 Schottky diodes
• CPC Class Codes: H01L 29/8725 of the trench MOS barrier type [TMBS]

Abstract

A high-speed, soft-recovery semiconductor device that reduces leakage current by increasing the Schottky ratio of Schottky contacts to pn junctions. In one embodiment of the present invention, an n⁻ drift layer is formed on an n⁺ cathode layer 1 by epitaxial growth, and ring-shaped ring trenches having a prescribed width are formed in the n⁻ drift layer. Oxide films are formed on the side walls of each ring trench. The ring trenches are arranged such that the centers of the rings of the ring trenches adjacent to one another form a triangular lattice unit. A p⁻ anode layer is formed at the bottom of each ring trench. Schottky contacts are formed at the interface between an anode electrode and the surface of the n⁻ drift layer. Ohmic contact is established between the surfaces of polysilicon portions and the anode electrode.

Claims

1. A semiconductor device, comprising:

a semiconductor substrate having a first major surface, an opposing second major surface, and a first conductivity type;

an anode electrode formed on the first major surface of the semiconductor substrate;

a plurality of Schottky contacts between the anode electrode and the semiconductor substrate;

a cathode region formed on a surface layer of the second major surface of the semiconductor substrate; and

a cathode electrode formed on the cathode region on a side of the cathode region opposite the second major surface of the semiconductor substrate, wherein

each of the Schottky contacts assumes, in the first major surface, a plane shape of a circle or a polygon, the polygon having apices arranged on the circumference a circle, and

straight lines connecting the centers of the circles or the polygons adjacent to one another form a triangular lattice.

2. The semiconductor device according to claim 1, further comprising:

a plurality of ring-shaped trenches, in a surface layer of the first major surface of the semiconductor substrate, having a prescribed width;

a plurality of first Schottky contacts between the anode electrode and portions of the semiconductor substrate that are located inside the trenches; and

a plurality of second Schottky contacts between the anode electrode and portions of the semiconductor substrate that are located outside the trenches.

3. The semiconductor device according to claim 2, further comprising:

insulating films formed on side walls of the trenches;

first semiconductor regions having a second conductivity type and contacting bottoms of the trenches; and

conductive materials filling the trenches and electrically connecting the first semiconductor regions to the anode electrode.

4. The semiconductor device according to claim 3, wherein an internal diameter r1 of the trenches satisfies a relationship of r1≦

about 10 μ

m.

5. The semiconductor device according to claim 4, wherein a length L1 of each side of a triangular unit of the triangular lattice satisfies a relationship of r1+Wt≦

L1≦

about 20 μ

m, where Wt is a width of the trenches and r1 is an internal diameter of the trenches.

6. The semiconductor device according to claim 5, wherein a width Wt of the trenches satisfies the relationship of Wt≦

about 2 μ

m.

7. The semiconductor device according to claim 4, wherein a width Wt of the trenches satisfies a relationship of Wt≦

about 2 μ

m.

8. The semiconductor device according to claim 3, wherein a length L1 of each side of a triangular unit of the triangular lattice satisfies a relationship of r1+Wt≦

L1≦

about 20 μ

m, where Wt is a width of the trenches.

9. The semiconductor device according to claim 8, wherein a width Wt of the trenches satisfies the relationship of Wt≦

about 2 μ

m.

10. The semiconductor device according to claim 8, wherein a length deviation of each of the three sides of the triangular lattice unit is within about 20% of the length L1.

11. The semiconductor device according to claim 3, wherein a width Wt of the trenches satisfies a relationship of Wt≦

about 2 μ

m.

12. The semiconductor device according to claim 3, further comprising an edge layer having the second conductivity type that is formed in the surface layer of the first major surface of the semiconductor substrate under an outermost circumference of the anode electrode.

13. The semiconductor device according to claim 12, wherein a width Le of the edge layer satisfies a relationship of Le≧

r1+2 Wt, where r1 is an internal diameter of the trenches and Wt is a width of the trenches.

14. The semiconductor device according to claim 13, wherein a diffusion depth Xje of the edge layer satisfies a relationship of Xje≧

Xjt, where Xjt is a depth of anode layers at the bottoms of the trenches.

15. The semiconductor device according to claim 14, wherein a shortest distance W1 between an edge of the edge layer and a closest trench satisfies a relationship of W1≦

L1, where L1 is a length of one side of a triangular unit of the triangular lattice.

16. The semiconductor device according to claim 13, wherein a shortest distance W1 between an edge of the edge layer and a closest trench satisfies a relationship of W1≦

L1, where L1 is a length of one side of a triangular unit of the triangular lattice.

17. The semiconductor device according to claim 12, wherein a diffusion depth Xje of the edge layer satisfies a relationship of Xje≧

Xjt, where Xjt is a depth of anode layers at the bottoms of the trenches.

18. The semiconductor device according claim 17, wherein a shortest distance W1 between an edge of the edge layer and a closest trench satisfies a relationship of W1≦

L1, where L1 is a length of one side of a triangular unit of the triangular lattice.

19. The semiconductor device according to claim 12, wherein a shortest distance W1 between an edge of the edge layer and a closest trench satisfies a relationship of W1≦

L1, where L1 is a length of one side of a triangular unit of the triangular lattice.

20. The semiconductor device according to claim 3, wherein the conductive materials are polysilicon materials and top ends of the polysilicon materials in the trenches are higher than the first major surface of the semiconductor substrate.

21. The semiconductor device according to claim 20, further comprising an insulating film and a polysilicon portion at top corners of each of the trenches.

22. The semiconductor device according to claim 2, further comprising:

insulating films that are formed on side walls and bottoms of the trenches; and

conductive materials that fill the trenches and are electrically connected to the anode electrode.

23. The semiconductor device according to claim 2, further comprising:

semiconductor regions that have a second conductivity type and are formed on side walls and bottoms of the trenches; and

conductive materials that fill the trenches and are electrically connected to the anode electrode.

24. The semiconductor device according to claim 1, further comprising:

ring-shaped semiconductor regions, in a surface layer of the first major surface of the semiconductor substrate, having a prescribed width and a second conductivity type;

first Schottky contacts between the anode electrode and portions of the semiconductor substrate that are located inside internal circles of the ring-shaped semiconductor regions; and

second Schottky contacts between the anode electrode and portions of the semiconductor substrate that are located outside outer circles of the ring-shaped semiconductor regions.

25. A semiconductor device, comprising:

a semiconductor substrate;

an anode electrode formed on one surface of the semiconductor substrate;

a plurality of ring-shaped trenches formed in the one surface of the semiconductor substrate, wherein centers, on the one surface of the semiconductor substrate, of each of the trenches form vertices of a triangular lattice;

a plurality of first Schottky contacts between the anode electrode and portions of the semiconductor substrate located inside the trenches; and

a plurality of second Schottky contacts between the anode electrode and portions of the semiconductor substrate located outside the trenches.

26. A method of forming a semiconductor device, comprising:

forming an anode electrode on one surface of a semiconductor substrate;

forming a plurality of ring-shaped trenches in the one surface of the semiconductor substrate, wherein centers, on the one surface of the semiconductor substrate, of each of the trenches form vertices of a triangular lattice;

forming a plurality of first Schottky contacts between the anode electrode and portions of the semiconductor substrate located inside the trenches; and

forming a plurality of second Schottky contacts between the anode electrode and portions of the semiconductor substrate located outside the trenches.