Semiconductor device and design support method of electronic device using the same

• US 20030052395A1
• Filed: 09/13/2002
• Published: 03/20/2003
• Est. Priority Date: 09/13/2001
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Nakamura, Satoshi, Torigoe, Makoto, Nakamura, Atsushi, Hara, Tsutomu, Suga, Takashi, Uesaka, Kouichi, Yokota, Hitoshi, Noma, Tatsuji
• Granted Patent: US 6,875,920 B2
• Time in Patent Office: Days
• US Class Current: 257/678
• CPC Class Codes: H01L 21/67282 Marking devices
• CPC Class Codes: H01L 2223/54406 comprising alphanumeric information
• CPC Class Codes: H01L 2223/5442 comprising non digital, non alphanumeric information, e.g. symbols
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 2223/54486 Located on package parts, e.g. encapsulation, leads, package substrate
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H05K 1/0231 Capacitors or dielectric substances
• CPC Class Codes: H05K 1/0266 Marks, test patterns or identification means
• CPC Class Codes: H05K 1/181 associated with surface mounted components
• CPC Class Codes: H05K 3/0005 for designing circuits by computer

Abstract

A semiconductor device includes a semiconductor die having patterned circuitry, a plurality of terminals coupled to the die, and an indication providing signal noise information of at least one of the terminals.

Claims

1. A semiconductor device, comprising:

a semiconductor die having patterned circuitry;

a plurality of terminals coupled to the die; and

an indication providing signal noise information of at least one of the terminals.

2. The device of claim 1, wherein the plurality of terminals include power supply terminals and ground terminals, where the signal noise information is provided for the power supply terminals and the ground terminals.

3. The device of claim 1, further comprising:

a package enclosing at least a portion of the die to protect the die, wherein the indication is provided on the package.

4. The device of claim 1, wherein the indication is a marking to provide a noise level classification or a value to provide a noise level intensity.

5. The device of claim 1, wherein the indication is provided on at least one of the terminals.

6. The device of claim 5, wherein the indication is provided by color-coding one or more of the terminals.

7. The device of claim 1, further comprising:

a package enclosing the die, wherein the indication is provided on the package.

8. A component for manufacturing an electronic device, comprising:

a semiconductor die having patterned circuitry;

a plurality of terminals coupled to the die; and

an indication providing signal noise information about at least one of the terminals.

9. The component of claim 8, wherein the plurality of terminals include power supply terminals and ground terminals, where the signal noise information is provided for the power supply terminals and the ground terminals.

10. The component of claim 8, further comprising:

a package enclosing at least a portion of the die to protect the die, wherein the indication is provided on the package.

11. The component of claim 8, wherein the indication is a marking to provide a noise level classification or a value to provide a noise level intensity.

12. The component of claim 8, wherein the indication is provided on at least one of the terminals.

13. The component of claim 12, wherein the indication is provided by color-coding one or more of the terminals.

14. The component of claim 8, wherein the indication provides information about selected terminals requiring suppression components to reduce electromagnetic interference on the selected terminals.

15. The component of claim 8, wherein the component is a semiconductor device.

16. The component of claim 8, further comprising:

a semiconductor device including the semiconductor die and the terminals; and

an information recording medium including the indication.

17. The component of claim 16, wherein the information recording medium is a printed document relating to the semiconductor device.

18. The component of claim 16, wherein the information recording medium is a computer readable medium.

19. The component of claim 16, wherein the semiconductor device is configured to be installed onto a printed circuit board and the indication provides information for selectively providing suppression components to one or more of the terminals that are believed to have significant noise levels.

20. The component of claim 16, wherein the semiconductor device is a wafer level chip size package device.

21. The component of claim 16, wherein the indication provides the signal noise information in a plurality of frequency bands.

22. The component of claim 20, wherein the signal noise information relates to a power supply noise intensity, a noise current, noise voltage, or noise electric power value, or a combination thereof.

23. The component of claim 8, wherein the signal noise information provides information using time waveforms or wavelets.

24. A semiconductor device, comprising:

a semiconductor die having patterned circuitry;

a plurality of power terminals coupled to the die;

a package enclosing the die and portions of the plurality of power terminals; and

an indication providing signal noise information of at least one of the power terminals, the signal noise information being a noise level classification or a noise level intensity,

wherein the indication is provided on the package or the at least one power terminal.

25. A semiconductor device, comprising:

a semiconductor die having patterned circuitry;

a plurality of power terminals coupled to the die;

a package enclosing the die and portions of the plurality of power terminals; and

a marking providing signal noise information of at least one of the power terminals, the marking being provided on the package or the at least one power terminal, the signal noise information being a noise level classification or a noise level intensity,

wherein the signal noise information is derived from determining electromagnetic interferences for each of the power terminals.

26. A method of designing an electronic device having a semiconductor device and a printed circuit board whereon the semiconductor device is installed, the method comprising:

obtaining signal noise levels for a plurality of terminals of the semiconductor device;

providing noise information on an information recording medium about at least one of the terminals of the semiconductor device that requires a suppression component to reduce a high signal noise level associated with the at least one terminals; and

determining a suitable layout design of the electronic device using the noise information provided in the information recording medium.