Electronic component allowing the decoding of a radiofrequency transmission channel conveying coded digital information, in particular for satellite digital telebroadcasting

• US 20030053562A1
• Filed: 05/17/2002
• Published: 03/20/2003
• Est. Priority Date: 05/18/2001
• Status: Active Grant

• Current Assignee: Stmicroelectronics France (STMicroelectronics NV)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Inventors: Louis-Gavet, Bernard, Busson, Pierre, Jouffre, Pierre-Olivier
• Granted Patent: US 8,483,644 B2
• Time in Patent Office: Days
• US Class Current: 375/322
• CPC Class Codes: H04L 27/06 Demodulator circuits; Receiver circuits
• CPC Class Codes: H04N 21/6143 involving transmission via a satellite
• CPC Class Codes: H04N 7/20 Adaptations for transmission via a GHz frequency band, e.g. via satellite

Abstract

The component, fully integrated onto a monolithic substrate, includes a tuner, a demodulator, and a channel decoder. The overall filtering is carried out in two parts, a baseband analog filtering and a digital Nyquist filtering removing the information of adjacent channels. It outputs a stream of MPEG data.

Claims

1. Electronic component, comprising an integrated circuit made on a monolithic substrate and incorporating

a tuning module (TZ) of the type having zero intermediate frequency possessing an input (ESO) able to receive analog signals, conveying digital information coded by a digital modulation, for example satellite digital television signals, composed of several channels extending over a predetermined frequency span, an analog block (BAN) comprising a frequency transposition stage followed by an analog filtering stage (FBB1, FBB2) for selecting a desired channel and delivering two phase quadrature baseband analog signals containing the information (ICN) conveyed by the selected channel and information of so-called adjacent channels (ICAD), and an analog/digital conversion stage (CAN1, CAN2) linked to the output of the analog block, and

a channel decoding digital module (DM), linked to the output of the analog/digital conversion stage, comprising a demodulation stage (DMD), a digital filtering stage (FN) for removing the said information of adjacent channels, and an error correction stage (CRE) for delivering a stream of data packets (FM) corresponding to the information conveyed by the desired channel.

2. Component according to claim 1, characterized in that the analog filtering stage (FBB) possesses a top cutoff frequency (F2) around 20% higher than the frequency half-width (F1) of a channel, in that the sampling frequency of the analog/digital conversion stage is around 2.5 times higher than the top cutoff frequency of the analog filtering stage, and in that the cutoff frequency of the digital filtering stage is equal to the frequency half-width of a channel.

3. Component according to claim 2, characterized in that the sampling frequency of the analog/digital conversion stage can be adjusted as a function of the central frequency Fd of the selected channel in such a way as to repel the harmonics of the sampling frequency out of the frequency span [Fd−

F2;

Fd+F2], where F2 designates the top cutoff frequency of the analog filtering stage.

4. Component according to one of the preceding claims, characterized in that it comprises a metal plate (PL) glued to the rear face of the substrate by a conducting glue, and intended to be earthed.

5. Component according to one of the preceding claims, characterized in that the substrate has a first type of conductivity, in that the elements performing a digital processing are disposed in a part (ZN) of the substrate which is insulated from the remaining part of the substrate by a semiconducting barrier (CH1, CH2, PT2) having a second type of conductivity differing from the first type of conductivity,

and in that the said semiconducting barrier is biased by a bias voltage different from that supplying the transistors situated in the said insulated part of the substrate.

6. Component according to one of the preceding claims, characterized in that the analog filtering stage is a bandpass filtering stage whose bottom cutoff frequency (F3) has a predetermined value greater than 0, in that the component comprises controllable generation means (SYT) able to deliver a mixing signal to the frequency transposition stage, in that the frequency of the mixing signal is below the central frequency (Fd) of the desired channel, by an offset value chosen at least equal to the value of the bottom cutoff frequency of the analog filter, and in that the demodulation stage comprises correction means (DRT) able to correct the phase noise, the frequency drift and the frequency offset of the generation means and to compensate for the bandpass filtering.

7. Component according to one of the preceding claims, characterized in that the analog block (BAN) of the tuning module comprises a first attenuator/amplifier stage with controlled gain (ETA1) connected between the signal input and the frequency transposition stage, in that the tuning module comprises a digital block (BNM) connected to the analog block by the analog/digital conversion stage,

in that the tuning module comprises first means of calculation (MCL, FIR1) able in an initialization phase to calculate the mean overall power of the entire signal received by the tuner,

first means of comparison (ADD1), incorporated into the digital block, and able to compare this overall calculated power with a first predetermined reference value corresponding to a maximum power desired at a predetermined location of the analog block,

first means of adjustment (TB1) able to adjust the gain of the first attenuator/amplifier stage as a function of the result of the said comparison so as to minimize the deviation between the calculated overall power and the said reference value,

and in that, in a normal operating phase in which a channel is selected, the gain of the first attenuator/amplifier stage is fixed.

8. Component according to claim 7, characterized in that the analog block of the tuner furthermore contains a second controlled-gain amplifier stage (AGC1, AGC2) connected downstream of the analog filtering stage, in that the tuning module also comprises

second means of calculation (MCL), connected to the output of the analog filtering stage (FBB1, FBB2), and able to calculate in the phase of normal operation the mean power of the selected channel,

second means of comparison (ADD2), incorporated into the digital block, and able to compare this mean calculated channel power with a second predetermined reference value corresponding to a maximum channel power desired at the input of the analog/digital conversion stage, and

second means of adjustment (TB2) able to adjust the gain of the second amplifier stage so as to minimize the deviation between the calculated channel power and the said second reference value.

9. Component according to claim 7 or 8, characterized in that the tuning module comprises

a controllable means of signal routing (MUX1), incorporated into the analog block, possessing an input terminal (BE) connected to the signal input, a first output terminal (BS1) connected to the input of the analog filtering stage (FBB1, FBB2), a second output terminal (BS2) connected directly to the input of the analog/digital conversion stage (CAN1, CAN2),

and in that, in the initialization phase, the routing means are controlled in such a way as to connect their input terminal and their second output terminal and in the normal operating phase they are controlled in such a way as to connect their input terminal and their first output terminal.

10. Device according to claim 9, characterized in that the signal routing means (MUX1) are disposed between the output of the first attenuator/amplifier stage (ETA1) and the input of the frequency transposition stage (MX1, MX2).

11. Device according to one of claims 7 to 10, characterized in that the digital block incorporates the first means of calculation (MCL).

12. Satellite digital television signal receiver, characterized in that it comprises an electronic component as defined in one of the preceding claims.