Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates

• US 20030054588A1
• Filed: 12/03/2001
• Published: 03/20/2003
• Est. Priority Date: 12/07/2000
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Reflectivity, Inc. (Texas Instruments, Inc.)
• Inventors: Patel, Satyadev R., Huibers, Andrew G., Chiang, Steven S.
• Granted Patent: US 6,969,635 B2
• Time in Patent Office: Days
• US Class Current: 438/107
• CPC Class Codes: B81B 2201/042 Micromirrors, not used as optical switches
• CPC Class Codes: B81B 7/0077 Other packages not provided for in groups B81B7/0035 - B81B7/0074
• CPC Class Codes: B81C 1/00214 Processes for the simultaneaous manufacturing of a network or an array of similar microstructural devices
• CPC Class Codes: B81C 1/00333 Aspects relating to packaging of MEMS devices, not covered by groups B81C1/00269 - B81C1/00325
• CPC Class Codes: B81C 1/00896 Temporary protection during separation into individual elements
• CPC Class Codes: B81C 1/00904 Multistep processes for the separation of wafers into individual elements not provided for in groups B81C1/00873 - B81C1/00896
• CPC Class Codes: B81C 2203/0118 Bonding a wafer on the substrate, i.e. where the cap consists of another wafer
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: G02B 26/0833 the reflecting element being a micromechanical device, e.g. a MEMS mirror, DMD G02B26/0825 takes precedence; micromechanical devices in general B81B
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01018 Argon [Ar]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01039 : Yttrium [Y]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/01054 : Xenon [Xe]
• CPC Class Codes: H01L 2924/01058 : Cerium [Ce]
• CPC Class Codes: H01L 2924/01072 : Hafnium [Hf]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/04953 : TaN
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/10329 : Gallium arsenide [GaAs]
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from contamination, physical contact, or other deleterious external events. Without additional changes to the MEMS structure between release and wafer bonding and singulation, except for an optional stiction treatment, the MEMS device is best protected and overall process flow is improved. The method is applicable to the production of any MEMS device and is particularly beneficial in the making of fragile micromirrors.

Claims

1. A method for making a spatial light modulator, comprising:

providing a first wafer;

providing a second wafer;

forming circuitry and a plurality of electrodes on or in the first wafer;

forming a plurality of deflectable elements on or in either the first or second wafer;

bonding the first and second wafers together to form a wafer assembly; and

separating the wafer assembly into individual wafer assembly dies.

2. The method of claim 1, wherein each die comprises an array of deflectable reflective elements.

3. The method of claim 2, wherein the reflective elements correspond to pixels in a direct-view or projection display.

4. The method of claim 3, wherein the number of reflective elements in each die is from 6,000 to about 6 million.

5. The method of claim 1, wherein the first wafer is an optically transmissive wafer or a wafer having one or more layers that when removed result in an optically transmissive substrate.

6. The method of claim 5, wherein the first wafer is glass, borosilicate, tempered glass, quartz or sapphire.

7. The method of claim 1, wherein the second wafer is a dielectric or semiconductor wafer.

8. The method of claim 7, wherein the second wafer comprises GaAs or silicon.

9. The method of claim 1, wherein the first and second wafers are bonded together with an adhesive.

10. The method of claim 9, wherein the adhesive is an epoxy.

11. The method of claim 10, wherein the epoxy comprises balls or rods of predetermined diameter.

12. The method of claim 1, wherein the wafer assembly is separated into individual dies by scribing and breaking.

13. The method of claim 1, wherein the wafer assembly is tested for abnormalities prior to separation into the individual dies.

14. The method of claim 1, further comprising providing a spacing wafer between the first and second wafers.

15. The method of claim 1, further comprising providing microfabricated spacers on one or both of the first and second wafers prior to bonding.

16. The method of claim 9, wherein the adhesive is dispensed by automated controlled liquid dispensing through a syringe.

17. The method of claim 9, wherein the adhesive is dispensed by screen, offset or roller printing.

18. The method of claim 16, wherein the syringe is moved along X-Y coordinates for dispensing.

19. The method of claim 1, wherein the aligning comprises registration of substrate fiducials on opposite wafers.

20. The method of claim 19, wherein the registration is accomplished with a video camera having lens magnification.

21. The method of claim 7, wherein the second wafer is a glass or quartz wafer.

22. The method of claim 1, wherein the bonding of the wafers comprises the dispensing of a UV or thermal cure epoxy.

23. The method of claim 22, wherein the bonding further comprises application of a force of 10 kg force or more.

24. The method of claim 1, wherein the aligning comprises aligning each deflectable element on the first wafer with at least one electrode on the second wafer.

25. The method of claim 1, wherein the separation of the wafer assembly comprises forming scribes on the first and second wafers.

26. The method of claim 25, wherein the scribes are placed in an offset relationship to each other in at least one direction.

27. The method of claim 25, wherein the separation further comprises breaking the wafer assembly along the scribe lines with a guillotine or fulcrum breaking machine.

28. The method of claim 1, wherein the separation of the wafer assembly comprises sawing partially through each wafer followed by breaking along the sawed lines.

29. The method of claim 1, wherein the sawing is done in the presence of a high-pressure jet of water.

30. The method of claim 1, wherein the bonding comprises applying a sealant near the perimeter of each array on the wafer.

31. The method of claim 30, further comprising applying a sealant around the perimeter of at least one of the wafers.

32. The method of claim 1, wherein the bonding comprises applying an adhesive and spacers, the spacers having a size of from 1 to 100 microns.

33. The method of claim 32, wherein the spacers have a size of from 1 to 20 microns.

34. The method of claim 1, wherein the plurality of deflectable elements are reflective mirror elements and are formed on the second wafer which is a light transmissive wafer, at least with any surface coating removed therefrom.

35. The method of claim 15, wherein the microfabricated spacers comprise an organic material.

36. The method of claim 32, wherein the spacers are glass or plastic spacers.

37. The method of claim 1, wherein the forming of the deflectable element comprises surface or bulk micromachining.

38. The method of claim 1, wherein the plurality of deflectable elements are formed on or in the first wafer.

39. The method of claim 38, wherein the circuitry and plurality of electrodes are formed prior to forming the plurality of deflectable elements, wherein the plurality of deflectable elements are formed above the plurality of electrodes on the first wafer.

40. The method of claim 39, wherein a plurality of light blocking masks are formed on the second wafer.

41. The method of claim 40, wherein when the wafer assembly is singulated into wafer assembly dies, a light blocking mask is disposed on a second wafer portion within each wafer assembly die.

42. The method of claim 1, wherein the plurality of deflectable elements are formed on or in the second wafer.

43. The method of claim 42, wherein when the first and second wafers are aligned and bonded together, the deflectable elements on the second wafer are each disposed proximate to a corresponding electrode on the first wafer.

44. The method of claim 1, further comprising packaging the wafer assembly dies.

45. The method of claim 1, wherein the deflectable elements are micromirrors having jagged or zig-zag edges.

46. The method of claim 1, further comprising applying a stiction reducing agent to one or both wafers before or after bonding the two wafers together, but before singulating the wafer assembly into dies.

47. The method of claim 1, further comprising applying a getter to one or both wafers before bonding the two wafers together into a wafer assembly.

48. The method of claim 47, wherein the getter is a molecular, hydrogen and/or particle getter.

49. The method of claim 47, wherein the getter is a particulate and moisture getter.

50. The method of claim 47, wherein the getter is capable of absorbing moisture.

51. The method of claim 46, wherein the stiction reducing agent is a silane applied to the deflectable elements.

52. The method of claim 46, wherein the stiction reducing agent is a chlorosilane.

53. The method of claim 1, further comprising aligning the wafers prior to bonding.

54. The method of claim 53, wherein the aligning of the wafers has an accuracy of 10 microns or less.

55. The method of claim 54, wherein the accuracy is 3 micron or less.

83. The method of claim 25, wherein the scribes are placed in an offset relationship to each other in at least one direction.

84. The method of claim 25, wherein the separation further comprises breaking the wafer assembly along the scribe lines with a guillotine or fulcrum breaking machine.

92. The method of claim 15, wherein the microfabricated spacers comprise an organic material.

56. A method for forming a MEMS device, comprising:

providing a first wafer;

providing a second wafer;

providing a sacrificial layer on or in the first or second wafer;

forming a plurality of MEMS elements on the sacrificial layer;

releasing the plurality of MEMS devices by etching away the sacrificial layer;

mixing one or more spacer elements into an adhesive or providing one or more spacer elements separately from the adhesive for separating the wafers during and after bonding;

applying the adhesive to one or both of the first and second wafers;

bonding the first and second wafers together with the spacer elements therebetween so that the first and second wafers are held together in a spaced apart relationship as a wafer assembly; and

singulating the wafer assembly into individual dies.

57. The method of claim 56, wherein the releasing comprises providing an etchant selected from an interhalogen, a noble gas fluoride, a vapor phase acid, or a gas solvent.

58. The method of claim 57, wherein the releasing is followed by a stiction treatment.

59. The method of claim 58, wherein the stiction treatment comprises treatment with a silane.

60. The method of claim 58, wherein the stiction treatment is followed by said bonding.

61. The method of claim 60, wherein the time from releasing to bonding is less than 6 hours.

62. The method of claim 56, wherein the first wafer is an optically transmissive wafer or a wafer having one or more layers that when removed result in an optically transmissive substrate.

63. The method of claim 62, wherein the first wafer is glass, borosilicate, tempered glass, quartz or sapphire.

64. The method of claim 56, wherein the second wafer is a dielectric or semiconductor wafer.

65. The method of claim 64, wherein the second wafer comprises GaAs or silicon.

66. The method of claim 56, wherein the first and second wafers are bonded together with an adhesive.

67. The method of claim 66, wherein the adhesive is an epoxy.

68. The method of claim 67, wherein the epoxy comprises balls or rods of predetermined diameter.

69. The method of claim 56, wherein the wafer assembly is separated into individual dies by scribing and breaking.

70. The method of claim 56, wherein the wafer assembly is tested for abnormalities prior to separation into the individual dies.

71. The method of claim 56, further comprising providing a spacing wafer between the first and second wafers.

72. The method of claim 56, further comprising providing microfabricated spacers on one or both of the first and second wafers prior to bonding.

73. The method of claim 66, wherein the adhesive is dispensed by automated controlled liquid dispensing through a syringe.

74. The method of claim 66, wherein the adhesive is dispensed by screen, offset or roller printing.

75. The method of claim 73, wherein the syringe is moved along X-Y coordinates for dispensing.

76. The method of claim 56, wherein the aligning comprises registration of substrate fiducials on opposite wafers.

77. The method of claim 76, wherein the registration is accomplished with a video camera having lens magnification.

78. The method of claim 64, wherein the second wafer is a glass or quartz wafer.

79. The method of claim 56, wherein the bonding of the wafers comprises the dispensing of a UV or thermal cure epoxy.

80. The method of claim 79, wherein the bonding further comprises application of a force of 10 kg force or more.

81. The method of claim 56, wherein the aligning comprises aligning each deflectable element on the first wafer with at least one electrode on the second wafer.

82. The method of claim 56, wherein the separation of the wafer assembly comprises forming scribes on the first and second wafers.

85. The method of claim 56, wherein the separation of the wafer assembly comprises sawing partially through each wafer followed by breaking along the sawed lines.

86. The method of claim 56, wherein the sawing is done in the presence of a high-pressure jet of water.

87. The method of claim 56, wherein the bonding comprises applying a sealant near the perimeter of each array on the wafer.

88. The method of claim 87, further comprising applying a sealant around the perimeter of at least one of the wafers.

89. The method of claim 56, wherein the bonding comprises applying an adhesive and spacers, the spacers having a size of from 1 to 100 microns.

90. The method of claim 89, wherein the spacers have a size of from 1 to 20 microns.

91. The method of claim 56, wherein the plurality of deflectable elements are reflective mirror elements and are formed on the second wafer which is a light transmissive wafer, at least with any surface coating removed therefrom.

93. The method of claim 89, wherein the spacers are glass or plastic spacers.

94. The method of claim 56, wherein the plurality of MEMS devices are optical or radio frequency switches, or are pressure or acceleration sensors.

95. The method of claim 56, further comprising packaging the wafer assembly dies.

96. The method of claim 56, wherein the MEMS devices are an array of micromirrors.

97. The method of claim 56, further comprising applying a stiction reducing agent to one or both wafers before or after bonding the two wafers together, but before singulating the wafer assembly into dies.

98. The method of claim 56, further comprising applying a getter to one or both wafers before bonding the two wafers together into a wafer assembly.

99. The method of claim 98, wherein the getter is a molecular, hydrogen and/or particle getter.

100. The method of claim 99, wherein the getter is a particulate and moisture getter.

101. The method of claim 99, wherein the getter is capable of absorbing moisture.

102. The method of claim 97, wherein the stiction reducing agent is a silane applied to the deflectable elements.

103. The method of claim 97, wherein the stiction reducing agent is a chlorosilane.

104. The method of claim 96, wherein a plurality of light blocking masks are formed on the second wafer.

105. The method of claim 104, wherein when the wafer assembly is singulated into wafer assembly dies, a light blocking mask is disposed on a second wafer portion within each wafer assembly die.

106. A method for making a MEMS device, comprising:

providing a first wafer;

providing a second wafer;

forming circuitry and a plurality of electrodes on or in the first wafer;

forming a plurality of deflectable elements on or in either the first or second wafer;

applying an adhesion reducing agent and/or a getter to one or both of the wafers;

aligning the first and second wafers;

bonding the first and second wafers together to form a wafer assembly; and

separating the wafer assembly into individual wafer assembly dies.

107. The method of claim 106, wherein a stiction reducing agent is applied to one or both wafers before or after bonding the two wafers together, but before singulating the wafer assembly into dies.

108. The method of claim 107, wherein the stiction reducing agent is applied to at least one of the wafers prior to wafer bonding.

109. The method of claim 106, wherein a getter is applied to one or both wafers before bonding the two wafers together.

110. The method of claim 109, wherein the getter is a molecular, hydrogen and/or particle getter.

111. The method of claim 110, wherein the getter is a particulate and moisture getter.

112. The method of claim 110, wherein the getter is capable of absorbing moisture.

113. The method of claim 107, wherein the stiction reducing agent is a silane applied in a vapor phase to the deflectable elements.

114. The method of claim 113, wherein the stiction reducing agent is a chlorosilane.

115. The method of claim 114, wherein the chlorosilane is a partially or fully fluorinated chlorosilane.

116. The method of claim 115, wherein the chlorosilane has an alkyl chain of at least 8 carbons or a ring structure.

117. The method of claim 116, wherein the chlorosialne is a trichlorosilane having an alkyl chain of at least 8 carbon atoms.

118. The method of claim 116, wherein the chlorosilane is a trichlorosilane having a single or multi ring organic substituent.

119. The method of claim 106, wherein one of the wafers is a glass or quartz wafer having one or more rectangular masks thereon.

120. The method of claim 119, wherein one of the wafers comprises an array of micromirrors and the other of the wafers is transmissive to visible light.

121. The method of claim 120, wherein the wafer transmissive to visible light comprises one or more visible light blocking areas.

122. The method of claim 121, wherein the visible light blocking areas are substantially rectangular.

123. The method of claim 106, wherein when the wafer assembly is singulated into wafer assembly dies, a light blocking mask is disposed on a second wafer portion within each wafer assembly die.

124. A method for making a MEMS device, comprising:

providing a wafer;

providing a plurality of substrates that are transmissive to visible light, each smaller than said wafer, each substrate having a frame portion that is not transmissive to visible light;

forming circuitry and a plurality of electrodes on or in the wafer;

forming a plurality of deflectable elements on or in the wafer;

aligning the substrates with the wafer;

bonding the substrates and wafer together to form a wafer assembly; and

separating the wafer assembly into individual wafer assembly dies.