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Method for forming shallow trench isolation in semiconductor device

  • US 20030054608A1
  • Filed: 09/17/2001
  • Published: 03/20/2003
  • Est. Priority Date: 09/17/2001
  • Status: Abandoned Application
First Claim
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1. A method for forming a shallow trench isolation structure for a semiconductor device, comprising the steps of:

  • forming a dielectric layer and an amorphous silicon layer over a semiconductor substrate;

    forming a mask layer over the amorphous silicon layer;

    patterning the mask layer, the amorphous silicon layer, the dielectric layer, and the substrate to form a trench in the substrate;

    growing a thermal oxide layer lining the sidewalls of the amorphous silicon layer and the trench, the thermal oxide layer being thinner at the position lining the amorphous silicon layer than at the position lining the trench; and

    filling the trench with an isolation layer to form a shallow trench isolation (STI) structure.

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