Superconductive crossbar switch

• US 20030054960A1
• Filed: 07/23/2002
• Published: 03/20/2003
• Est. Priority Date: 07/23/2001
• Status: Active Grant

• Current Assignee: Fernand D. Bedard
• Original Assignee: Fernand D. Bedard
• Inventors: Bedard, Fernand D.
• Granted Patent: US 6,960,929 B2
• Time in Patent Office: Days
• US Class Current: 505/100
• CPC Class Codes: H03K 17/92 by the use, as active elements, of superconductive devices
• CPC Class Codes: H04Q 2213/1302 Relay switches
• CPC Class Codes: H04Q 2213/1304 Coordinate switches, crossbar, 4/2 with relays, coupling field
• CPC Class Codes: H04Q 2213/13305 Transistors, semiconductors in general
• CPC Class Codes: H04Q 2213/1334 Configuration within the switch
• CPC Class Codes: H04Q 2213/13341 Connections within the switch
• CPC Class Codes: H04Q 3/0004 using crossbar selectors in the switching stages
• CPC Class Codes: H04Q 3/521 using semiconductors in the switching stages

Abstract

A superconductor crossbar switch for connecting a plurality of inputs with a plurality of outputs, including a switching cell having an input, an output and a circuit for connecting the input with the output for bidirectionally transmitting data therebetween. The connection of the retaining and releasing circuitry of a plurality of cells enables the switch to simultaneously retain a selected cell or cells of a group of cells and disable the remaining cells of that group, whereby a subsequent query on a disabled cell is inoperative until the selected cell or cells is released. The crossbar switch is characterized by latency on the order of nanoseconds, a data rate per channel on the order of gigabits per second, essentially zero crosstalk, and detection of contention in nanoseconds or less and resolution of contention in nanoseconds or less.

Claims

1. A superconducting crossbar switch, comprising:

a plurality of input lines;

a matrix of a plurality of cells, each of the plurality of cells being coupled to one of the plurality of input lines, wherein each cell includes;

a first circuit portion containing a first superconducting switch; and

a second circuit portion, wherein a first signal via the second circuit portion triggers the first superconducting switch;

a plurality of output lines, each of the plurality of output lines coupled to one of the plurality of cells.

2. The switch of claim 1, wherein the second circuit portion includes a second superconducting switch.

3. The switch of claim 2, wherein the second circuit portion comprises a first leg and a second leg, the second leg including the second superconducting switch, wherein a signal via the first leg of the second circuit portion triggers the first superconducting switch.

4. The switch of claim 3, wherein each cell of the plurality of cells further includes:

a third circuit portion, wherein a second signal via the third circuit portion triggers the second superconducting switch.

5. The switch of claim 1, wherein the first circuit portion includes a first resistor in series with the first superconducting switch.

6. The switch of claim 5, wherein the first superconducting switch is in series with a coupling to a first ground connection.

7. The switch of claim 6, wherein the first circuit portion includes a second resistor coupled in series with the first resistor.

8. The switch of claim 7, wherein the second resistor is in series with a coupling to one from the plurality of output lines.

9. The switch of claim 4, wherein the first leg of the second circuit portion includes an inductor.

10. The switch of claim 4, wherein the second leg of the second circuit portion is in series with a coupling to a second ground connection.

11. The switch of claim 1, wherein the first signal is produced via a first current in the second circuit portion.

12. The switch of claim 4, wherein the second signal is produced via a second current in the third circuit portion.

13. The switch of claim 1, wherein the first signal is an optical signal.

14. The switch of claim 4, wherein the second signal is an optical signal.

15. The switch of claim 1, wherein the matrix of a plurality of cells includes 32 rows and 32 columns of cells, and wherein the plurality of input lines includes 32 input lines and the plurality of output lines includes 32 output lines.

16. The switch of claim 1, further comprising a plurality of summing devices, wherein each of the plurality of output lines is coupled in series with one from the plurality of summing devices.

17. The switch of claim 16, wherein each of the plurality of summing devices includes a third superconducting switch.

18. The switch of claim 16, wherein each of the plurality of summing devices includes a first summing device circuit portion and a second summing device circuit portion.

19. The switch of claim 18, wherein the second summing device circuit portion includes a third superconducting device, and wherein a third signal via the first summing device circuit portion triggers the third superconducting device.

20. The switch of claim 19, wherein each of the plurality of summing devices includes a summing device output.

21. The switch of claim 20, wherein the triggering of the third superconducting device produces an output signal via the summing device output.

22. The switch of claim 20, wherein the summing device output is coupled to a memory device.

23. The switch of claim 22, wherein each of the plurality of summing devices includes a summing device input.

24. The switch of claim 23, wherein the summing device input is coupled to the first summing device circuit.

25. The switch of claim 24, wherein the first summing device circuit includes at least a fourth superconducting device.

26. The switch of claim 25, wherein each of the at least a fourth superconducting device is coupled in series to a third ground connection.

27. The switch of claim 25, wherein the at least a fourth superconducting device includes the fourth superconducting device and a fifth superconducting device.

28. The switch of claim 26, wherein the summing device input is coupled to the memory device.

29. The switch of claim 26, wherein each of the at least a fourth superconducting switch are coupled in series between the coupling to the third ground connection and a point at which the summing device input is coupled to the first summing device circuit.

30. The switch of claim 16, wherein each of the plurality of output lines is capable of bidirectionally transmitting a signal.

31. The switch of claim 22, further comprising a plurality of input drivers coupled in series with each of the plurality of input lines.

32. The switch of claim 23, wherein each of the plurality of input drivers includes a sixth superconducting switch.

33. The switch of claim 31, wherein each of the plurality of input drivers includes a first input driver circuit portion and a second input driver circuit portion.

34. The switch of claim 33, wherein the second input driver circuit portion includes a sixth superconducting device, and wherein a fourth signal via the first input driver circuit portion triggers the sixth superconducting device.

35. The switch of claim 34, wherein the input driver includes an input driver output.

36. The switch of claim 35, wherein the triggering of the sixth superconducting device produces an output signal via the input driver output.

37. The switch of claim 35, wherein the input driver output is coupled to a processor.

38. The switch of claim 37, wherein each of the plurality of input drivers includes an input driver input.

39. The switch of claim 38, wherein the input driver input is coupled to the first input driver circuit.

40. The switch of claim 39, wherein the first input driver circuit includes at least a seventh superconducting device.

41. The switch of claim 40, wherein each of the at least a seventh superconducting device is coupled in series to a fourth ground connection.

42. The switch of claim 41, wherein the at least a seventh superconducting device includes the seventh superconducting device and an eighth superconducting device.

43. The switch of claim 42, wherein the input driver input is coupled to the processor.

44. The switch of claim 41, wherein each of the at least a seventh superconducting switch are coupled in series between the coupling to the fourth ground connection and a point at which the input driver input is coupled to the first input driver circuit.

45. The switch of claim 16, wherein each of the plurality of summing devices includes an amplifier.

46. The switch of claim 18, wherein each of the plurality of summing devices includes a third summing device circuit portion.

47. The switch of claim 46, wherein the third summing device circuit portion includes a ninth superconducting device, and wherein a fifth signal via the first summing device circuit portion triggers the ninth superconducting device.

48. The switch of claim 47, wherein each of the plurality of summing devices includes a summing device contention output.

49. The switch of claim 48, wherein the triggering of the ninth superconducting device produces an output signal via the summing device contention output.

50. A superconducting crossbar switch, comprising:

a matrix of a plurality of cells, wherein each cell includes;

a first circuit portion containing a first superconducting switch; and

a second circuit portion, wherein a first signal via the second circuit portion triggers the first superconducting switch.

51. A superconducting crossbar switch, comprising:

a matrix of a plurality of cells, wherein each cell includes;

a first circuit portion containing a first superconducting switch; and

a second circuit portion, wherein a first signal via the second circuit portion triggers the first superconducting switch;

first and second processor glue chips coupled to the matrix of a plurality of cells;

first and second memory glue chips coupled to the matrix of a plurality of cells;

a first plurality of processors coupled to the first glue chip via a first input data line;

a second plurality of processors coupled to the second glue chip;

a first plurality of memory devices coupled to the first memory glue chip; and

a second plurality of memory devices coupled to the second memory glue chip.

52. A crossbar switch for connecting a plurality of inputs with a plurality of outputs, comprising:

at least one switching cell, comprising;

at least one input device;

at least one output device; and

at least one connecting switch for bi-directionally transmitting data between the at least one input device and the at least one output device, each of the at least one connecting switch comprising;

a first superconductive switch; and

a first control switch to control operation of the connecting switch.

53. The crossbar switch of claim 52, wherein the first superconductive switch has zero resistance and negligible crosstalk.

54. The crossbar switch of claim 52, wherein the connecting switch allows connection among a plurality of functional units.

55. The crossbar switch of claim 52, further comprising:

a second superconductive switch; and

a second control switch for retaining and releasing operation of the first superconductive switch.

56. The crossbar switch of claim 52, further comprising:

a switching cell, comprising;

a plurality of cells arranged in a matrix with the at least one input device coupled to the plurality of cells, and the at least one output device coupled to the plurality of cells.

57. The crossbar switch of claim 56, wherein the switching cell further comprises:

a feedback mechanism.

58. The crossbar switch of claim 57, wherein the plurality of cells further comprise:

retaining and releasing devices connected to the at least one output device to simultaneously retain a selected cell of the plurality of cells and disable the remaining cells of the plurality of cells, whereby a subsequent transmission to a disabled cell is inoperative until the selected cell is released.

59. The crossbar switch of claim 52, wherein the at least one output device comprises:

a summing device for summing output currents.

60. The crossbar switch of claim 59, wherein the summing device comprises at least one selected from:

a summing amplifier; and

an additional superconductive switch.

61. The crossbar switch of claim 52, further comprising:

a sensing apparatus coupled to the at least one connecting switch for detecting simultaneous pulses to cells, generating an indication of conflict from the simultaneous pulses, and resolving the conflict.

62. A method for transmitting information via a superconducting crossbar switch, the switch including a plurality of cells, each of the cells including a first superconducting switch in a first circuit portion, a coupling to an input line, a coupling to an output line, and a second circuit portion, the method comprising:

transmitting a control signal to the second circuit portion;

the second circuit portion producing a first switching signal in response to receiving the control signal;

the first switching signal triggering the first superconducting switch; and

the triggering of the first superconducting switch allowing transmission of an output signal via the output line.

63. The method of claim 62, wherein the switching signal comprises an electrical signal.

64. The method of claim 62, wherein the switching signal comprises an optical signal.

65. The method of claim 62, wherein the second circuit portion includes a second superconducting switch, and wherein each of the cells includes a third circuit portion, the method further comprising:

transmitting a clamp line signal to the third circuit portion;

the third circuit portion producing a second switching signal in response to receiving the clamp line signal;

the second switching signal triggering the second superconducting switch; and

the triggering of the second superconducting switch allowing the second circuit portion to produce the first switching signal.

66. The method of claim 62, further comprising:

transmitting an input to the superconducting crossbar switch; and

the transmission input producing the output signal via the output line.

67. The method of claim 66, wherein a plurality of output lines are associated with the plurality of cells, and wherein transmitting an input to the superconducting crossbar switch includes:

selecting one from the plurality of output lines for which data is to be transmitted; and

identifying at least one from the plurality of cells corresponding to the selected one from the plurality of output lines.

68. The method of claim 66, wherein each output line for the plurality of cells is coupled to a summing device, the summing device including a first circuit portion and a second circuit portion, wherein the second circuit portion includes a third superconducting switch, the method further comprising:

transmitting the output signal via the output line to the first circuit portion of the summing device;

the first circuit portion of the summing device producing a summing device control line signal;

the control line signal triggering the third superconducting switch; and

the triggering of the third superconducting switch producing a transmission to a memory input.

69. The method of claim 68, wherein each input line for the plurality of cells is coupled to an input driver, the input driver including a first circuit portion and a second circuit portion, wherein the input driver second circuit portion includes a fourth superconducting switch, and wherein the input driver first circuit portion includes at least a fifth superconducting switch, the method further comprising:

the input driver first circuit portion receiving a signal; and

the received input driver first circuit portion signal driving each of the at least a fifth superconducting switch into a voltage state.

70. The method of claim 68, wherein the summing device first circuit portion includes at least a sixth superconducting switch, the method further comprising:

transmitting an inverted amplified signal corresponding to the memory input to the summing device first circuit portion;

the inverted amplified signal driving each of the at least a sixth superconducting switch into a voltage state; and

transmitting the inverted amplified signal via at least one of the plurality of cells to the input driver first circuit portion.

71. The method of claim 70, wherein the inverted amplified signal received by the input driver first circuit portion comprises an acknowledge signal.

72. A method for resolving contention in a crossbar switch having a plurality of inputs, at least one output, a plurality of switching devices, and at least one contention sensor, wherein each of the switching devices is coupled to at least one of the plurality of inputs, and wherein each of the at least one contention sensor is coupled to one of the at least one output, the method comprising:

a first one of the plurality of inputs transmitting a first input signal to a first one of the plurality of switching devices;

a second one of the plurality of inputs, concurrently with transmission of the first input signal, transmitting a second input signal to a second one of the plurality of switching devices;

transmitting a combined switch output from the first and the second switching devices to one of the at least one output;

the contention sensor sensing the combined switch output; and

upon sensing the combined switch output, the contention sensor preventing generation of an output signal via the one of the at least one output.

73. The method of claim 72, wherein preventing generation of an output signal via the one of the at least one output further includes:

preventing generation of an acknowledgment signal to each of the first one and the second one of the plurality of inputs.

74. The method of claim 72, wherein each of the plurality of switching devices comprises a switching device superconducting switch.

75. The method of claim 72, wherein the contention sensor comprises a contention sensor superconducting device.

76. The method of claim 73, further comprising:

determining absence of an acknowledgment signal;

upon determining absence of an acknowledgment signal, the first one of the plurality of inputs retransmitting the first input signal, and the second one of the plurality of inputs retransmitting the second input signal.

77. A method for providing a broadcast signal via a crossbar switch having a plurality of inputs, at least one output, and a plurality of switching devices, wherein each of the switching devices is coupled to at least one of the plurality of inputs, the method comprising:

transmitting a control signal to each of the plurality of switching devices from which a switch output is to be transmitted;

transmitting an input signal to at least one of the plurality of switching devices; and

for each of the plurality of switching devices receiving the control signal and receiving the input signal, the switching device generating an output signal to any of the at least one output.

78. The method of claim 77, wherein each of the plurality of switching devices comprises a superconducting switch.

79. The method of claim 78, wherein the switching device preventing generation of an output signal to any of the at least one output includes:

generating a current in the switching device; and

the generated current causing the superconducting switch to conduct.

80. A method for transmitting a signal via a crossbar switch having a plurality of inputs, at least one output, and a plurality of switching devices, wherein each of the switching devices is coupled to at least one of the plurality of inputs, the method comprising:

transmitting an input signal to each of the plurality of switching devices;

transmitting a control signal to each of the at least one of the plurality of switching devices from which an output is to be generated; and

for each of the plurality of switching devices receiving the control signal and receiving the input signal, the switching device generating an output signal to one of the at least one output.

81. The method of claim 80, wherein, each of the plurality of switching devices receiving the input signal and receiving no control signal is prevented from generating the output signal to any of the at least one output.

82. The method of claim 81, wherein each of the plurality of switching devices comprises a superconducting switch.

83. The method of claim 82, wherein, the superconducting switch in the plurality of switching devices is coupled to ground, and wherein each of the plurality of switching devices preventing generation of the output signal to any of the at least one output includes:

the input signal generating a current in the switching device; and

conducting the generated current via the superconducting switch to the ground.