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Circuit for measuring changes in capacitor gap using a switched capacitor technique

  • US 20030057967A1
  • Filed: 12/19/2001
  • Published: 03/27/2003
  • Est. Priority Date: 09/24/2001
  • Status: Active Grant
First Claim
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1. A capacitive sensor circuit for measuring changes in a variable that can be measured according to changes in capacitor gap, the circuit comprising:

  • an operational amplifier including an inverting input terminal, a noninverting input terminal, and an output terminal, wherein said noninverting input terminal is operatively coupled to ground;

    a first capacitor coupled to said inverting input of said operational amplifier, wherein the first capacitor is a reference capacitor;

    a second capacitor coupled between the inverting input terminal and the output terminal of said operational amplifier, wherein said second capacitor is a sensor capacitor and wherein a reference node is connected to said second capacitor;

    a timing device, said timing device having two phases, said two phases including a first phase and a second phase, wherein the two phases are nonoverlapping phases;

    a plurality of switching devices, wherein said switching devices include a first group of switches and a second group of switches, wherein each group of said switches are responsive to a phase of said timing device, wherein said first group of switches closes during a first phase of said timing device and said second group of switches closes during a second phase of said timing device;

    a plurality of voltage generating devices, wherein each of said voltage generating devices is operatively coupled to the circuit via a switch thereby generating a substantially constant voltage to the circuit;

    wherein during the first phase of the clock, a first substantially constant reference voltage is supplied to the first capacitor via a first switch, and a second substantially constant reference voltage is supplied via a second switch to the reference node operatively connected to said second capacitor, thereby canceling DC offset voltage;

    wherein during the second phase of the clock, a third substantially constant reference voltage is supplied via a third switch to the first capacitor; and

    wherein the first operational amplifier includes one amplifier stage;

    such that the electrical signal output from the output terminal of the operational amplifier is correlated to a change in a variable measurable by change in a capacitor gap.

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