System and method for analyzing and optimizing computer system performance utilizingobserved time performance measures

• US 20030061324A1
• Filed: 09/21/2001
• Published: 03/27/2003
• Est. Priority Date: 09/21/2001
• Status: Active Grant

• Current Assignee: Lenovo International Limited (Lenovo Group Ltd.)
• Original Assignee: International Business Machines Corporation
• Inventors: Piazza, William Joseph, Bertram, Randal Lee, Atherton, William Edward, McKnight, Gregory Joseph
• Granted Patent: US 6,961,794 B2
• Time in Patent Office: Days
• US Class Current: 709/223
• CPC Class Codes: G06F 11/3409 for performance assessment
• CPC Class Codes: G06F 11/3485 for I/O devices
• CPC Class Codes: G06F 11/349 for interfaces, buses
• CPC Class Codes: G06F 2201/81 Threshold
• CPC Class Codes: G06F 2201/88 Monitoring involving counting

Abstract

A data processing system and method analyze the performance of its components by obtaining measures of usage of the components over time as well as electrical requirements of those components to recommend an optimal configuration. The location in the system and the time duration that any one or more components is in a performance-limiting or bottleneck condition is determined. Based on the observed bottlenecks, their times of occurrence and their time duration, more optimal configurations of the system are recommended. The present invention is particularly adapted for use in data processing systems where a peripheral component interconnect (PCI) bus is used.

Claims

1. A method for analyzing data processing system performance and identifying one or more optimum configurations of the data processing system, comprising the steps of:

determining whether one or more components of the system is operating in a present configuration under constraints and the times that the constraints occur;

for those components operating under constraints, determining if any occur at common times with other such components; and

based on the steps of determining, generating alternate proposed configurations to the present configuration of the data processing system.

2. The method of claim 1, wherein the step of determining whether one or more components is operating under constraints is performed after a specified time of operation of the data processing system has elapsed.

3. The method of claim 1, further including the step of:

forming an output display of proposed alternate configurations formed during said step of generating.

4. The method of claim 1, further including the step of:

identifying as incompatible pairs any set of two components operating under constraints at common times with each other.

5. The method of claim 4, wherein the step of generating alternate configurations excludes the identified incompatible pairs from the alternate configurations generated.

6. The method of claim 1, further including the step of:

identifying as incompatible pairs any set of two components operating on a common bus segment under constraints at common times with each other.

7. The method of claim 1, wherein the components of the data processing equipment comprise adapters.

8. A system for analyzing data processing system performance and identifying one or more optimum configurations of the data processing system, said system comprising:

an interconnect;

a processor coupled to the interconnect;

a memory coupled to the processor; and

a system analyzer/optimizer resident in the memory and executable by the processor to generate proposed alternate configurations of the data processing system, wherein responsive to a determination that one or more components of the system is operating in a present configuration under constraints at observed times, and that at least two of such components are determined operating under constraints at common times with each other, said system analyzer/optimizer generates alternate proposed configurations to the present configuration of the data processing system.

9. The system according to claim 8, wherein the data processing system includes a plurality of adaptors coupled to an interconnect, and the system analyzer/optimizer includes:

means for generating alternate connections between the plurality of interconnectors and the interconnect.

10. The system of claim 8, wherein the system analyzer/optimizer generates proposed alternate configurations after a specified time of operation of the data processing system has elapsed.

11. The system of claim 8, further including:

an output display indicating proposed alternate configurations generated by the system analyzer/optimizer.

12. The system of claim 8, wherein the system analyzer/optimizer receives indications as incompatible pairs those components operating under constraints at common times with each other.

13. The system of claim 12, wherein the system analyzer/optimizer generates alternate proposed configurations excluding the identified incompatible pairs from the alternate proposed configurations.

14. The system of claim 8, wherein the system analyzer/optimizer receives indications as incompatible pairs those components operating under constraints at common times with each other.

15. A computer program product comprising:

a computer-usable medium; and

a system analyzer/optimizer resident in the memory and executable by a processor to generate proposed alternate configurations of a data processing system, wherein responsive to a determination that one or more components of the system is operating in a present configuration under constraints at observed times, and that at least two of such components are determined operating under constraints at common times with each other, said system analyzer/optimizer generates alternate proposed configurations to the present configuration of the data processing system.

16. The computer program product of claim 15, wherein the data processing system includes a plurality of adapters coupled to an interconnect, and wherein said system analyzer/optimizer further includes:

instructions, encoded within the computer-usable medium, for generating alternate connections between the plurality of adaptors and the interconnect.

17. The computer program product of claim 15, wherein the instructions for generating include:

instructions, encoded within the computer-usable medium, for generating proposed alternate configurations after a specified time of operation of the data processing system has elapsed.

18. The computer program product of claim 15, wherein the instructions for generating include:

instructions, encoded within the computer-useable medium, for generating output displays indicating proposed alternate configurations generated by the system analyzer/optimizer.

19. The computer system product of claim 15, wherein the instructions include:

instructions, encoded within the computer-usable medium, indicating as incompatible pairs those components operating under constraints at common times with each other.

20. The computer system product of claim 19, wherein the instructions include:

instructions, encoded within the computer-usable medium, excluding the identified incompatible pairs from the alternate proposed configurations.

21. The computer system product of claim 15, wherein the instructions include:

instructions, encoded within the computer-usable medium, indicating as incompatible pairs those components operating under constraints on a common bus segment at common times with each other.