Serial communication device with multi-mode operation of message receive buffers
First Claim
1. A CAN module comprising:
- a buffer memory comprising a data and address input and a plurality of addressable buffers;
a data receive register being coupled with said buffer memory receiving data from a serial data stream;
a filter register;
a comparator comparing said filter register value with an identifier transmitted in said serial data stream generating an acceptance signal;
a buffer pointer coupled with said comparator to receive said acceptance signal; and
a multiple function address register unit having a first mode in which said unit receives an address from said buffer pointer for addressing said buffer memory and a second mode in which said acceptance signal is coupled with a count input of said address multiple function address register unit, whereby said address register value is altered upon generation of said acceptance signal.
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Accused Products
Abstract
A CAN module comprising a buffer memory comprising a data and address input and a plurality of addressable buffers, a data receive register being coupled with the buffer memory receiving data from a serial data stream, a filter register, a comparator comparing the filter register value with an identifier transmitted in the serial data stream generating an acceptance signal, a buffer pointer coupled with the comparator to receive said acceptance signal, and a multiple function address register unit comprising a first mode in which the unit receives an address from the buffer pointer for addressing the buffer memory and a second mode in which the acceptance signal is coupled with an incrementer within the multiple function address register unit wherein the incrementer increments the address register upon generation of the acceptance signal. The arrangement can be switched between two modes. The module operates in a first mode and dynamically assigns any filter register to any buffer within the buffer memory. The second mode operates as a FIFO memory.
18 Citations
29 Claims
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1. A CAN module comprising:
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a buffer memory comprising a data and address input and a plurality of addressable buffers;
a data receive register being coupled with said buffer memory receiving data from a serial data stream;
a filter register;
a comparator comparing said filter register value with an identifier transmitted in said serial data stream generating an acceptance signal;
a buffer pointer coupled with said comparator to receive said acceptance signal; and
a multiple function address register unit having a first mode in which said unit receives an address from said buffer pointer for addressing said buffer memory and a second mode in which said acceptance signal is coupled with a count input of said address multiple function address register unit, whereby said address register value is altered upon generation of said acceptance signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 13)
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11. A microcontroller comprising:
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a central processing unit;
a random access memory connected to said central processing unit; and
a CAN module coupled with said central processing unit, wherein said CAN module comprises;
a buffer memory comprising a data and address input and a plurality of addressable buffers;
a data receive register being coupled with said buffer memory receiving data from a serial data stream;
a filter register;
a comparator comparing said filter register value with an identifier transmitted in said serial data stream generating an acceptance signal;
a buffer pointer coupled with said comparator to receive said acceptance signal; and
a multiple function address register unit comprising a first mode in which said unit receives an address from said buffer pointer for addressing said buffer memory and a second mode in which said acceptance signal is coupled with a count input of said address multiple function address register unit, whereby said address register value is altered upon generation of said acceptance signal. - View Dependent Claims (12, 14, 15, 16, 17, 18, 19, 20, 21, 23, 24, 25, 26, 27, 28, 29)
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22. A method of operating a CAN module with multiple operating modes comprising the steps of:
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receiving a data stream;
generating an identifier and data out of said data stream;
comparing said identifier with a filter value;
generating an acceptance signal if said comparison is positive;
in a first mode supplying an address upon generation of said acceptance signal to a buffer memory address input;
in a second mode incrementing or decrementing an address upon reception of each acceptance signal and supplying said address to said buffer memory; and
storing associated data in said addressed buffer.
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Specification