Adaptive radio transceiver with a local oscillator

• US 20030067359A1
• Filed: 06/07/2002
• Published: 04/10/2003
• Est. Priority Date: 10/21/1999
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Rofougaran, Maryam, Darabi, Hooman, Rofougaran, Ahmadreza
• Granted Patent: US 7,031,668 B2
• Time in Patent Office: Days
• US Class Current: 331/46
• CPC Class Codes: H03B 21/01 by beating unmodulated signals of different frequencies
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03H 11/1291 Current or voltage controlled filters
• CPC Class Codes: H03H 2011/0494 Complex filters
• CPC Class Codes: H03H 21/0001 Analogue adaptive filters
• CPC Class Codes: H03H 21/0012 Digital adaptive filters
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22
• CPC Class Codes: H04B 1/40 Circuits
• CPC Class Codes: H04B 17/104 of other parameters, e.g. DC offset, delay or propagation times
• CPC Class Codes: H04B 17/14 of the whole transmission and reception path, e.g. self-test loop-back
• CPC Class Codes: H04B 17/19 Self-testing arrangements

Abstract

An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Claims

1. An oscillator circuit, comprising:

an oscillator to generate a first signal having a first frequency;

a second oscillation source to generate a second signal having a second frequency; and

a mixer to mix to the first and second signals.

2. The oscillator circuit of claim 1 further comprising a filter coupled to the mixer to pass signals comprising the sum of the first and second frequencies.

3. The oscillator circuit of claim 2 wherein the filter comprises a bandpass filter.

4. The oscillator circuit of claim 1 wherein the second oscillation source comprises a second oscillator.

5. The oscillator circuit of claim 1 wherein the second oscillation source comprises a frequency divider coupled to the oscillator.

6. The oscillator circuit of claim 5 further comprising a first buffer positioned between the oscillator and frequency divider, and a second buffer positioned between the frequency divider and the mixer.

7. The oscillator circuit of claim 5 wherein the frequency divider is programmable.

8. The oscillator circuit of claim 5 further comprising a filter coupled to the mixer to pass signals comprising the sum of the first and second frequencies.

9. The oscillator circuit of claim 8 wherein the filter comprises a bandpass filter.

10. The oscillator circuit of claim 5 wherein the oscillator, frequency divider and mixer are each quadrature.

11. The oscillator circuit of claim 10 wherein the quadrature mixer comprises a plurality of Gilbert cells.

12. The oscillator circuit of claim 10 wherein the oscillator comprises an in-phase (I) output and a quadrature (Q) output, the frequency divider comprises an I input coupled to the I output of the oscillator, a Q input coupled to the O output of the oscillator, an I output, and a Q output, and the mixer comprises first, second, third and fourth mixers each having first and second inputs and an output, the I output from the oscillator being coupled to the first inputs of the first and third mixers, the Q output from the oscillator being coupled to the first inputs of the second and fourth mixers, the I output from the frequency divider being coupled to the second inputs of the first and fourth mixers, and the Q output from the frequency divider being coupled to the second inputs of the second and third mixers, the outputs of the first and second mixers being coupled together, and the outputs of the third and fourth mixers being coupled together.

13. The oscillator circuit of claim 12 wherein the first, second, third and fourth mixers each comprise a Gilbert cell.

14. The oscillator circuit of claim 12 further comprising a subtractor to combine the first and second mixer outputs, and a summer to combine the third and fourth mixer outputs.

15. The oscillator circuit of claim 12 wherein the frequency divider comprises an internal divider with input and output buffers.

16. The oscillator circuit of claim 15 wherein the input buffer comprises a first buffer comprising the I input to the frequency, a second buffer comprising the Q input to the frequency divider, and a third buffer to combine outputs of the first and second stage buffers and couple the combined outputs of the first and second stage buffers to the internal divider, the internal divider having I and Q outputs, and wherein the output buffer comprises a first buffer coupled to the I output of the internal divider, and a second buffer coupled to the Q output of the internal divider, the first buffer of the output buffer having an output comprising the I output of the frequency divider, and the second buffer of the output buffer having an output comprising the Q output of the frequency divider.

17. An oscillator circuit, comprising:

oscillation means for generating a first signal having a first frequency;

signal generation means for generating a second signal having a second frequency; and

mixer means for mixing the first and second signals.

18. The oscillator circuit of claim 17 further comprising filtering means for passing signals comprising the sum of the first and second frequencies.

19. The oscillator circuit of claim 18 wherein the filtering means comprises a bandpass filter.

20. The oscillator circuit of claim 17 wherein the signal generation means comprises an oscillator.

21. The oscillator circuit of claim 17 wherein the signal generation means comprises divider means for dividing the first frequency of the first signal to generate the second signal.

22. The oscillator circuit of claim 21 further comprising first buffing means for coupling the oscillation means to the divider means, and a second buffering means for coupling the divider means to the mixer means.

23. The oscillator circuit of claim 21 wherein the divider means comprises means for programming a divisor for the first frequency.

24. The oscillator circuit of claim 21 further comprising filter means, coupled to the mixer means, for passing signals comprising the sum of the first and second frequencies.

25. The oscillator circuit of claim 24 wherein the filtering means comprises a bandpass filter.

26. The oscillator circuit of claim 21 wherein the oscillator means, divider means and mixer means are each quadrature.

27. The oscillator circuit of claim 26 wherein the quadrature mixer means comprises a plurality of Gilbert cells.

28. A transceiver, comprising:

a local oscillator generator having an oscillator with a first signal having a first frequency, a frequency divider coupled to the oscillator to divide the first frequency of the first signal to produce a second signal having a second frequency, the frequency divider having a programmable divisor, and a mixer to mix the first and second signals; and

a controller to program the divisor.

29. The transceiver of claim 28 wherein the local oscillator further comprises a filter coupled to the mixer to pass signals comprising the sum of the first and second frequencies.

30. The transceiver of claim 29 wherein the filter comprises a bandpass filter.

31. The transceiver of claim 28 wherein the local oscillator comprises a first buffer positioned between the oscillator and frequency divider, and a second buffer positioned between the frequency divider and the mixer.

32. The transceiver of claim 28 wherein the local oscillator comprises a filter coupled to the mixer to pass signals comprising the sum of the first and second frequencies.

33. The transceiver of claim 32 wherein the filter comprises a bandpass filter.

34. The transceiver of claim 28 wherein the oscillator, frequency divider and mixer are each quadrature.

35. The transceiver of claim 34 wherein the quadrature mixer comprises a plurality of Gilbert cells.

36. The transceiver of claim 34 wherein the oscillator comprises an in-phase (I) output and a quadrature (Q) output, the frequency divider comprises an I input coupled to the I output of the oscillator, a Q input coupled to the O output of the oscillator, an I output, and a Q output, and the mixer comprises first, second, third and fourth mixers each having first and second inputs and an output, the I output from the oscillator being coupled to the first inputs of the first and third mixers, the Q output from the oscillator being coupled to the first inputs of the second and fourth mixers, the I output from the frequency divider being coupled to the second inputs of the first and fourth mixers, and the Q output from the frequency divider being coupled to the second inputs of the second and third mixers, the outputs of the first and second mixers being coupled together, and the outputs of the third and fourth mixers being coupled together.

37. The transceiver of claim 36 wherein the first, second, third and fourth mixers each comprise a Gilbert cell.

38. The transceiver of claim 36 further comprising a subtractor to combine the first and second mixer outputs, and a summer to combine the third and fourth mixer outputs.

39. The transceiver of claim 36 wherein the frequency divider comprises an internal divider with input and output buffers.

40. The transceiver of claim 39 wherein the input buffer comprises a first buffer comprising the I input to the frequency, a second buffer comprising the Q input to the frequency divider, and a third buffer to combine outputs of the first and second stage buffers and couple the combined outputs of the first and second stage buffers to the internal divider, the internal divider having I and Q outputs, and wherein the output buffer comprises a first buffer coupled to the I output of the internal divider, and a second buffer coupled to the Q output of the internal divider, the first buffer of the output buffer having an output comprising the I output of the frequency divider, and the second buffer of the output buffer having an output comprising the Q output of the frequency divider.

41. The transceiver of claim 28 wherein the controller programs the divisor to equal 2.

42. A method of generating a signal having a signal frequency, comprising:

generating a first signal having a first frequency;

dividing the first frequency to generate a second signal having a second frequency; and

mixing the first and second signals to generate the signal frequency.

44. The method of claim 42 further comprising buffing the first signal before the first signal is frequency divided to generate the second signal, and buffering the second signal before the second signal is mixed with the first signal.

45. The method of claim 44 wherein the division of the first frequency comprises programming a divisor for the first frequency.

46. The method of claim 45 wherein the programming of the divisor comprises programming the divisor to equal 2.

43. The method of 42 further comprising filtering the mixed first and second signals to pass the sum of the first and second frequencies, the sum of the first and second frequencies comprising the signal frequency.

47. A method of generating a local oscillator having a signal frequency, comprising:

generating a first signal having a first frequency;

generating a second signal having a second frequency;

mixing the first and second signals to generate the signal frequency.

48. The method of claim 47 further comprising filtering the mixed first and second signals to pass the sum of the first and second frequencies, the sum of the first and second frequencies comprising the signal frequency.

49. The method of claim 47 wherein the generation of the second signal comprises dividing the first frequency of the first signal to generate the second signal.

50. The method of claim 49 further comprising buffing the first signal before the first signal is frequency divided to generate the second signal, and buffering the second signal before the second signal is mixed with the first signal.

51. The method of claim 49 wherein the division of the first frequency comprises programming a divisor for the first frequency.

52. The method of claim 51 wherein the programming of the divisor comprises programming the divisor to equal 2.

53. The method of claim 49 further comprising filtering the mixed first and second signals to pass the sum of the first and second frequencies, the sum of the first and second frequencies comprising the signal frequency.