Water cooled inverter

• US 20030067748A1
• Filed: 03/19/2002
• Published: 04/10/2003
• Est. Priority Date: 10/09/2001
• Status: Active Grant

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Saito, Ryuichi, Nakamura, Takayoshi, Tamba, Akihiro, Momma, Naohiro
• Granted Patent: US 6,661,659 B2
• Time in Patent Office: Days
• US Class Current: 361/699
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 2924/1627 stacked type assemblies, e.g. stacked multi-cavities
• CPC Class Codes: H05K 7/20927 Liquid coolant without phase change

Abstract

According to the invention, there is provided a water cooled inverter structure forming a plurality of shallow cavities and deep cavities in a housing, fixing a bottom surface of power semiconductor modules to shallow cavities to form a shallow water channel and directly cooling the power semiconductor modules using this shallow water channel. Since cooling water flows fast in the shallow water channel, it is possible to improve a cooling efficiency and also reduce pressure loss using a deep water channel with deep cavities. Furthermore, providing a plurality of cavities makes it possible to reduce a size of the power semiconductor modules and provide a plurality of power semiconductor modules, thus improving reliability. It is possible to place a control board below the water channel to thermally cut off the control board from the power semiconductor modules, which makes it possible to reduce temperature of a control circuit.

Claims

1. A water cooled inverter comprising:

a water channel in which cooling water flows; and

a power circuit device on which a power semiconductor chip is mounted, the power circuit device being provided with a metallic body on its bottom surface, wherein

a water channel area for cooling said power circuit device is defined by a bottom surface of said metallic body and a part of a container accommodating said power circuit device,

said cooling water directly contacts said metallic body, and

the depth of said water channel area for cooling said power circuit device is determined by the depth of a cavity provided in a part of said container and/or the depth of a cavity of the bottom surface of said metallic body.

2. The water cooled inverter according to claim 1, wherein

said water channel in which the cooling water flows has at least two areas of different depths,

the shallowest water channel area is defined by a bottom surface of the power circuit device on which said power semiconductor chip is mounted and a housing of said power circuit device, and

the depth of said water channel area is determined by the depth of a cavity formed in a part of said housing.

3. The water cooled inverter according to claim 2, wherein

the depth of the shallowest water channel area for cooling said power circuit device is 5 mm or less.

4. The water cooled inverter according to claim 2, wherein

a control circuit board for controlling said power circuit device is placed above the power circuit device having said power semiconductor chip, and

a circuit device mounted on said control circuit board is connected to a top cover covering the control circuit board via a heat conductive resin sheet.

5. The water cooled inverter according to claim 2, wherein

a control circuit board for controlling said power circuit device is placed below the power circuit device having said power semiconductor chip and the water channel.

6. The water cooled inverter according to claim 5, wherein

the power circuit device connected to and controlled by said control circuit board comprises said power semiconductor chip and the control circuit for controlling said power semiconductor chip which are housed in a common resin box.

7. A water cooled inverter comprising:

a water channel in which cooling water flows;

a power circuit device on which a power semiconductor chip is mounted, the power circuit device being provided with a metallic body on its bottom surface; and

a control circuit board for controlling said power circuit device, wherein

a water channel area for cooling said power circuit device is defined by a bottom surface of said metallic body and a part of the housing of said power circuit device,

said cooling water directly contacts said metallic body, and

there are at least two control circuit boards for controlling said power circuit device, which are provided above and below said power circuit device and the water channel area for cooling said power circuit device, respectively.

8. The water cooled inverter according to claim 7, wherein

said water channel allowing the cooling water to flow has at least two areas of different depths,

the shallowest water channel area is defined by a bottom surface of the power circuit device having said power semiconductor chip and a housing of said power circuit device, and

the depth of said water channel area is determined by the depth of a cavity formed in a part of said housing.

9. A water cooled inverter comprising:

a water channel in which cooling water flows;

a power circuit device on which a power semiconductor chip is mounted, the power circuit device being provided with a metallic body on its bottom surface;

at least two control circuit boards for controlling said power circuit device; and

a top cover and bottom cover for covering the top and bottom of the apparatus, respectively, wherein

a housing of said power circuit device comprises a container constituting a water channel connected to a bottom surface of said power circuit device so that the cooling water directly contacts said bottom surface of said power circuit device, and a side wall surrounding said power circuit device, and at least one of said control circuit boards is housed in the bottom cover.