Hillock-free aluminum wiring layer and method of forming the same

• US 20030068522A1
• Filed: 01/15/2002
• Published: 04/10/2003
• Est. Priority Date: 05/31/2001
• Status: Active Grant

• Current Assignee: InnoLux Corporation
• Original Assignee: CHI MEI Optoelectronics Corporation
• Inventors: Wang, Cheng-Chi
• Granted Patent: US 6,620,527 B2
• Time in Patent Office: Days
• US Class Current: 428/654
• CPC Class Codes: B32B 15/02 Layer formed of wires, e.g. mesh
• CPC Class Codes: B32B 15/20 comprising aluminium or copper B32B15/016 and B32B15/017 take precedence
• CPC Class Codes: C22C 21/00 Alloys based on aluminium
• CPC Class Codes: C23C 14/165 by cathodic sputtering
• CPC Class Codes: H01L 21/32051 Deposition of metallic or metal-silicide layers
• CPC Class Codes: H01L 21/76838 characterised by the formation and the after-treatment of the conductors etching for patterning the conductors H01L21/3213
• CPC Class Codes: H01L 23/53214 the principal metal being aluminium
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 428/931 Components of differing electric conductivity
• CPC Class Codes: Y10T 428/12639 Adjacent, identical composition, components
• CPC Class Codes: Y10T 428/12764 Next to Al-base component
• CPC Class Codes: Y10T 428/12986 Adjacent functionally defined components
• CPC Class Codes: Y10T 428/24942 including components having same physical characteristic in differing degree
• CPC Class Codes: Y10T 428/24992 Density or compression of components

Abstract

A hillock-free wiring layer and method of forming the same are provided. The wiring layer includes at least two aluminum (Al) layers formed on a substrate, and each of the Al layers includes Al crystal particles. For any two Al layers of the wring layer, the one closer to the substrate is called the lower layer and the other one is called the higher layer. Besides, the Al crystal particles of the higher Al layer are larger and denser than that of the lower Al layer, and the lower Al layer has a higher resistance than that of the higher Al layer. By the invention, a wiring layer using either pure Al or an Al-based alloy is capable of preventing the occurrence of hillocks and reducing manufacturing cost.

Claims

1. A wiring layer comprising at least two pure aluminum (Al) layers formed on a substrate, wherein said at least two pure Al layers comprise:

a first pure Al layer formed on the substrate, said first layer including a plurality of first Al crystal particles; and

a second pure Al layer formed on the first pure Al layer, said second layer including a plurality of second Al crystal particles;

wherein said second Al crystal particles are substantially larger in size than said first Al crystal particles, and said second Al crystal particles of said second pure Al layer are more densely arranged than said first Al crystal particles of said first pure Al layer;

whereby said at least two pure Al layers of the wiring layer are capable of preventing hillocks.

2. A wiring layer according to claim 1, wherein said first pure Al layer has an electric resistance larger than that of said second pure Al layer.

3. A wiring layer according to claim 1, wherein said at least two pure layers have an electric resistance less than 4 μ

Ω

·

cm.

4. A method for forming a hillock-free wiring layer, wherein said wiring layer is formed on a substrate and comprises at least two pure aluminum (Al) layers, the method comprising the steps of:

under a first film formation pressure and a first film formation making power, forming a first pure Al layer on the substrate; and

under a second film formation pressure and a second film formation making power, forming a second pure Al layer on said first pure Al layer; and

wherein said second pure Al layer has a plurality of second Al crystal particles larger substantially in size than said first Al crystal particles of said first pure Al layer, and said second Al crystal particles of said second pure Al layer are more densely distributed than said first Al crystal particles of said first pure Al layer.

5. A method according to claim 4, wherein said first pure Al layer has an electric resistance larger than that of said second pure Al layer.

6. A method according to claim 4, wherein said first and second film formation pressures are not less than 4.0 Pa.

7. A method according to claim 4, wherein said first film making power is less than said second film making power.

8. A method for forming a hillock-free wiring layer including N pure aluminum layers formed on a substrate, wherein said N pure aluminum layers are deposited on the substrate and N is an integer greater than two, the method comprising the steps of:

(a) under a first film formation pressure and a first film formation making power, forming a first pure Al layer on the substrate;

(b) setting i to be two;

(c) under an i-th film formation pressure and an i-th film formation making power, forming an i-th pure Al layer on an (i-1)-th pure Al layer; and

(d) incrementing i by one, and repeating said steps (c) and (d) until i is greater than N;

wherein the j-th pure Al layer has a plurality of j-th Al crystal particles, where j is an integer less than N and greater than zero, (j+1)-th Al crystal particles are substantially larger in size than j-th Al crystal particles, said (j+1)-th Al crystal particles of said (j+1)-th pure Al layer are more densely distributed than said j-th Al crystal particles of said j-th pure Al layer, and said j-th pure Al layer has an electric resistance larger than that of said (j+1)-th pure Al layer.

9. A method according to claim 8, wherein said j-th film formation pressure through said N-th film formation pressure is at least about 4.0 Pa.

10. A method according to claim 8, said j-th film making power is less than said (j+1)-th film formation making power.

11. A wiring layer comprising at least two layers formed on a substrate, wherein said at least two layers are substantially made of aluminum (Al), said at least two layers comprising:

a first layer formed on the substrate and substantially having a plurality of first crystal particles; and

a second layer formed on said first layer and substantially having a plurality of second crystal particles;

wherein said second crystal particles are substantially larger in size than said first crystal particles, and said second crystal particles of said second layer are more densely distributed than said first crystal particles of said first layer;

whereby said at least two layers of the wiring layer are capable of preventing hillocks.

12. A wiring layer according to claim 11, wherein both said first and second layers are made of Al alloys.

13. A wiring layer according to claim 11, wherein said first layer is an Al alloy layer and said second layers is a pure Al layer.

14. A wiring layer according to claim 11, wherein said first layer is a pure Al layer and said second layer is an Al alloy layer.

15. A wiring layer according to claim 11, or 12, or 13, wherein said Al alloy layer includes at least one kind of additional element.

16. A wiring layer according to claim 15, wherein said at least one kind of additional element comprise a rare earth element.

17. A wiring layer according to claim 16, wherein said rare earth element is neodymium (Nd).