Mechanism for packet component merging and channel assignment, and packet decomposition and channel reassignment in a multiprocessor system

• US 20030076831A1
• Filed: 03/21/2001
• Published: 04/24/2003
• Est. Priority Date: 05/31/2000
• Status: Abandoned Application

• Current Assignee: Compaq Computer Corporation (HP Inc.)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Steely, Simon C. Jr., Van Doren, Stephen R., Sharma, Madhumitra
• Application Number:
  US09/813,579
• Publication Number:
  US 20030076831A1
• Time in Patent Office: Days
• US Class Current: 370/394
• CPC Class Codes: G06F 15/17375 One dimensional, e.g. linear array, ring

Abstract

A technique efficiently combines data and ordered transactions in a multiprocessor system having a plurality of nodes interconnected by a hierarchical switch. The technique further enables an ordered channel of the system to make progress in the presence of a blocked interface within the hierarchical switch. Specifically, the technique combines ordered components and unordered data components into common packets that are transmitted over an ordered channel of the system in the event that ordered and unordered components are generated simultaneously. The technique further allows, in the event that a combined packet in the ordered channel is stalled due to a data buffer dependency, the packet to be decomposed into an ordered component and an unordered data component wherein the ordered component remains in the ordered channel and the unordered data component is reassigned to the unordered data channel.

Claims

1. A method for efficiently transmitting packets within a multiprocessor computer system having a plurality of multiprocessor nodes interconnected by a switch fabric, the system having one or more ordered virtual channels and one or more unordered virtual channels configured to carry request and response packets among the multiprocessor nodes, the method comprising the steps of:

providing at a first node at least one ordered queue for storing packets subject to an ordering requirement in the multiprocessor computer system;

providing at the first node at least one unordered buffer for storing packets which are not subject to an ordering requirement;

receiving at the first node a single, common packet that includes both an ordered component and an unordered component;

determining whether available space exists at the ordered queue and at the unordered buffer;

if available space exists at the ordered queue, but not at the unordered buffer, decomposing the single, common packet into a separate ordered component and a separate unordered component; and

placing the separate ordered component that was decomposed from the single, common packet into the ordered queue, thereby allowing the ordered virtual channel to progress.

2. The method of claim 1 further comprising the step of holding the unordered component that was decomposed from the single, common packet until there is available space at the unordered buffer.

3. The method of claim 2 further comprising the steps of:

providing an ordered linked list;

providing an unordered linked list;

in response to receiving the single, common packet, adding the ordered component to the ordered linked list and the unordered component to the unordered linked list; and

if available space exists at the ordered queue, but not at the unordered buffer, the step of decomposing comprises the steps of;

removing the ordered component from the ordered linked list; and

moving the unordered component to a tail of the unordered linked list.

4. The method of claim 3 further comprising the steps of:

providing a table having a plurality of entries configured to store packets received at the first node;

storing the single, common packet that includes both the ordered component and the unordered component at the table;

5. The method of claim 4 wherein the single, common packet is formed when the ordered and unordered components are generated substantially simultaneously.

6. The method of claim 5 wherein the single, combined packet is a short fill that includes an ordered fill marker command component and an unordered long fill data component.

7. A method for efficiently transmitting packets within a multiprocessor computer system having a plurality of multiprocessor nodes interconnected by a switch fabric, the system having one or more ordered virtual channels and one or more unordered virtual channels configured to carry request and response packets among the multiprocessor nodes, the method comprising the steps of:

combining an ordered response component with an unordered response component to form a single, combined response packet;

placing the single, combined response packet into an ordered virtual channel for transmission to a requesting processor;

detecting a stall condition at the ordered virtual channel into which the single, combined response packet was placed;

in response to detecting the stall condition, decomposing the single, combined response packet back into a separate ordered response component and a separate unordered response component; and

placing the decomposed unordered response component into an unordered virtual channel for transmission to the requesting processor, thereby permitting the unordered component to progress through the system despite the stall condition at the ordered virtual channel.

8. The method of claim 7 wherein the command response component remains in the ordered virtual channel.

9. The method of claim 8 wherein the decomposing and placing steps occur provided that the unordered virtual channel is available.

10. The method of claim 8 further comprising the steps of:

receiving a memory reference operation at a first node of the multiprocessor system, the memory reference operation issued by the requesting processor and specifying requested data;

generating a command response component in response to the memory reference operation; and

generating a fill data component in response to the memory reference operation, the fill data component including the requested data, wherein

the command response component corresponds to the ordered response component, and

the fill data component corresponds to the unordered response component.

11. The method of claim 10 wherein the single, combined transaction has a command type, the method further comprising the step of setting the command type of the single, combined transaction such that it is recognized by the multiprocessor system as a short fill command response.

12. The method of claim 11 wherein the step of decomposing comprises the steps of:

replicating the short fill command response;

changing the command type of the replicated short fill command response such that it is recognized by the multiprocessor system as a long fill command response.

13. The method of claim 12 further comprising the step of changing the command type of the single, combined transaction remaining in the ordered virtual channel such that it is recognized by the multiprocessor system as a fill marker response.

14. The method of claim 13 wherein the virtual channels include:

a QIO channel configured to accommodate processor command packet requests for programmed input/output (I/O) read and write transactions;

a Q0 channel configured to accommodate processor command packet requests for memory read transactions;

a Q0Vic channel configured to accommodate processor command packet requests for memory write transactions;

a Q1 channel configured to accommodate command response packets directed to ordered responses for QIO, Q0 and Q0Vic requests; and

a Q2 channel configured to accommodate response packets directed to unordered responses for QIO, Q0 and Q0Vic requests.

15. The method of claim 14 wherein the ordered virtual channel into which the single, combined transaction is placed is the Q1 virtual channel.

16. The method of claim 15 wherein unordered virtual channel into which the decomposed fill data component is placed is the Q2 virtual channel.

17. The method of claim 16 wherein decomposed long fill data component is transmitted over the Q2 virtual channel while the short fill command response component remains in the stalled Q1 virtual channel.