Methods and circuitry for reducing intermodulation in integrated transceivers
First Claim
1. A method of measuring an injection lock frequency range for an integrated circuit having a first voltage-controlled oscillator and a second voltage-controlled oscillator, the method comprising the steps of:
- applying a control voltage to an input of the second voltage-controlled oscillator such that an output frequency of the second voltage-controlled oscillator locks to an output frequency of the first voltage-controlled oscillator; and
varying the output frequency of the first voltage-controlled oscillator until the output frequency of the second voltage-controlled oscillator falls out of lock with the output frequency of the first voltage-controlled oscillator.
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Accused Products
Abstract
Methods and circuitry reduce adverse impacts of intermodulation and optimize performance of integrated circuits that include two or more oscillator circuits on the same chip. In one embodiment, intermodulation between voltage-controlled oscillators (VCOs)in the receiver and transmitter paths of a transceiver is reduced by adjusting relative power of the VCOs and/or bandwidths of the phase-locked loops (PLLs). The invention measures the injection lock frequency range of the VCOs based on which transmitter and receiver VCO power and loop bandwidths are adjusted.
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Citations
34 Claims
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1. A method of measuring an injection lock frequency range for an integrated circuit having a first voltage-controlled oscillator and a second voltage-controlled oscillator, the method comprising the steps of:
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applying a control voltage to an input of the second voltage-controlled oscillator such that an output frequency of the second voltage-controlled oscillator locks to an output frequency of the first voltage-controlled oscillator; and
varying the output frequency of the first voltage-controlled oscillator until the output frequency of the second voltage-controlled oscillator falls out of lock with the output frequency of the first voltage-controlled oscillator. - View Dependent Claims (2, 3, 4, 5, 6)
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7. A method of computing an injection signal power within a voltage-controlled oscillator on an integrated circuit, the method comprising the steps of:
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determining an injection lock frequency range of the voltage-controlled oscillator;
determining a que of an LC tank within a voltage-controlled oscillator;
determining a free-run frequency of the Voltage-controlled oscillator;
determining a free-run output power of the voltage-controlled oscillator; and
calculating an injection signal power value proportional to a product of a square of the injection lock frequency range, a square of the que, and the free-run output power of the voltage-controlled oscillator divided by a square of the free-run output frequency of the voltage-controlled oscillator. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14)
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15. A method of reducing an injection lock frequency range of a second voltage-controlled oscillator in an integrated circuit having first and second voltage-controlled oscillators, the method comprising the steps of:
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measuring an injection lock frequency range of the second voltage-controlled oscillator; and
increasing a free-run output power of the second voltage-controlled oscillator. - View Dependent Claims (16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
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26. A method of reducing intermodulation between a first voltage-controlled oscillator (VCO) in a first phase-locked loop (PLL) and a second VCO in a second PLL, comprising:
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measuring an injection lock frequency range of the second VCO with respect to the first VCO;
measuring a signal power of the second VCO;
determining a crosstalk power between the first and the second VCOs using the measured injection lock frequency range and the measured signal power of the second VCO; and
adjusting a signal power ratio between the first VCO and the second VCO to reduce intermodulation. - View Dependent Claims (27, 28, 29)
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30. A transceiver circuit comprising:
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a transmitter having a first phase-locked loop (PLL), the first PLL having a first voltage-controlled oscillator (VCO);
a receiver having a second PLL, the second PLL having a second VCO; and
a parasitic loop that couples signals between the transmitter and the receiver causing intermodulation, wherein, the first VCO is configured to have a different power level relative to that of the second VCO to reduce the intermodulation. - View Dependent Claims (31, 32, 33, 34)
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Specification