Electronic assembly with filled no-flow underfill and methods of manufacture

• US 20030080437A1
• Filed: 10/26/2001
• Published: 05/01/2003
• Est. Priority Date: 10/26/2001
• Status: Active Grant

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Intel Corporation
• Inventors: Djukic, Milan, Gonzalez, Carlos A., Shi, Song-Hua
• Granted Patent: US 7,323,360 B2
• Time in Patent Office: Days
• US Class Current: 257/778
• CPC Class Codes: H01L 21/563 Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/29036 covering only the central area of the surface to be connected
• CPC Class Codes: H01L 2224/29075 Plural core members
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29386 with a principal constituent of the material being a non metallic, non metalloid inorganic material
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/325 Material
• CPC Class Codes: H01L 2224/73203 Bump and layer connectors
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/81193 wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/81903 by means of a layer connector
• CPC Class Codes: H01L 2224/83192 wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
• CPC Class Codes: H01L 24/29 of an individual layer connector
• CPC Class Codes: H01L 24/32 of an individual layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/05442 : SiO2
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/12044 : OLED
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/3511 : Warping
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: Y10T 29/49144 : by metal fusion
• CPC Class Codes: Y10T 29/49146 : with encapsulating, e.g., potting, etc.

Abstract

High yield, high reliability, flip-chip integrated circuit (IC) packages are achieved utilizing a combination of heat and pressure to bond flip-chip die and to cure no-flow underfill material. The underfill comprises a filler or low coefficient of thermal expansion (CTE) material to decrease CTE of the cured underfill. The filler material can be selected from the group comprising silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, aluminum nitride, or a mixture thereof. The filler material may also increase the viscosity of the uncured underfill and/or increase the modulus of elasticity of the cured underfill. In some method embodiments, a thermocompression bonder is used to simultaneously provide solder bump reflow and underfill curing. Application of various methods to a component package, an electronic assembly, and an electronic system are also described.

Claims

1. A method comprising:

depositing a no-flow underfill material in a component mounting area of a substrate, the component mounting area comprising a plurality of pads;

placing a component on the component mounting area, such that terminals of the component are aligned with corresponding pads and substantially enveloped in the underfill material;

applying suitable pressure to cause the terminals to physically contact the pads; and

applying suitable heat to harden the underfill material.

2. The method recited in claim 1, wherein, in depositing, the underfill material is deposited over the pads.

3. The method recited in claim 1, wherein, in depositing, the underfill material comprises a filler material to reduce the coefficient of thermal expansion.

4. The method recited in claim 1, wherein, in depositing, the underfill material comprises a filler material to increase the modulus of elasticity.

5. The method recited in claim 1, wherein, in depositing, the underfill material comprises a filler material to increase the viscosity.

6. The method recited in claim 1, wherein, in depositing, the underfill material comprises a filler material selected from the group comprising silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, and aluminum nitride.

7. The method recited in claim 6, wherein, in depositing, the filler material is in the range of 0% to 80%, by weight, of the underfill material.

8. The method recited in claim 1, wherein, in depositing, the underfill material comprises filler particles having a size in the range of 0.05 microns to 40 microns.

9. The method recited in claim 8, wherein, in depositing, the filler particles are substantially spherical.

10. The method recited in claim 1, wherein, in depositing, the underfill material comprises a resin selected from the group comprising an epoxy resin, a siloxirane resin, a superoxirane resin, a polybenzoxazine resin, a benzocyclobutane resin, or a mixture thereof.

11. The method recited in claim 1, wherein, in depositing, the underfill material comprises a fluxing agent.

12. The method recited in claim 11, wherein, in depositing, the fluxing agent is selected from the group comprising an organic carboxylic acid, a polymeric fluxing agent that has one or more carboxylic acid groups, an organic compound that contains one or more hydroxyl groups, or a mixture thereof.

13. The method recited in claim 1, wherein the pads are pre-coated with solder, and wherein, in applying suitable heat, the terminals become attached to the pads through the solder.

14. The method recited in claim 1, wherein the terminals are pre-coated with solder, and wherein, in applying suitable heat, the terminals become attached to the pads through the solder.

15. The method recited in claim 1, wherein the terminals and the pads are pre-coated with solder, and wherein, in applying suitable heat, the terminals become attached to the pads through the solder.

16. The method recited in claim 1, wherein the operations of applying suitable pressure and suitable heat are performed substantially concurrently.

17. The method recited in claim 16, wherein the operations of applying suitable pressure and suitable heat are performed by apparatus from the group comprising a thermocompression bonder and an ultrasonic bonder.

18. The method recited in claim 1, wherein the operation of applying suitable pressure is performed by a die placement tool.

19. The method recited in claim 18, wherein the pads are pre-coated with solder, and wherein the method further comprises:

pre-attaching the terminals to the pads by applying suitable heat using the die placement tool.

20. The method recited in claim 18, wherein the terminals are pre-coated with solder, and wherein the method further comprises:

pre-attaching the terminals to the pads by applying suitable heat using the die placement tool.

21. The method recited in claim 18, wherein the operation of applying suitable heat is performed by solder reflow apparatus.

22. A component package fabricated by:

depositing a no-flow underfill material in a component mounting area of a substrate, the component mounting area comprising a plurality of pads;

placing a component on the component mounting area, such that terminals of the component are aligned with corresponding pads and substantially enveloped in the underfill material;

applying suitable pressure to cause the terminals to physically contact the pads; and

applying suitable heat to harden the underfill material.

23. The component package recited in claim 22 and fabricated such that the operations of applying suitable pressure and suitable heat are performed substantially concurrently by apparatus from the group comprising a thermocompression bonder, an ultrasonic bonder, and a component placement tool.

24. The component package recited in claim 22 and fabricated such that the pads are pre-coated with solder, and wherein, in applying suitable heat, the terminals become attached to the pads through the solder.

25. The component package recited in claim 22 and fabricated such that the terminals are pre-coated with solder, and wherein, in applying suitable heat, the terminals become attached to the pads through the solder.

26. The component package recited in claim 22, wherein the underfill material comprises a filler material selected from the group comprising silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, and aluminum nitride.

27. An electronic assembly comprising at least one integrated circuit (IC) package fabricated by:

depositing a no-flow underfill material in an IC mounting area of a substrate, the IC mounting area comprising a plurality of pads;

placing an IC on the IC mounting area, such that terminals of the IC are aligned with corresponding pads and substantially enveloped in the underfill material;

applying suitable pressure to cause the terminals to physically contact the pads; and

applying suitable heat to harden the underfill material.

28. The electronic assembly recited in claim 27 and fabricated such that the operations of applying suitable pressure and suitable heat are performed substantially concurrently by apparatus from the group comprising a thermocompression bonder, an ultrasonic bonder, and a component placement tool.

29. The electronic assembly recited in claim 27, wherein the underfill material comprises a filler material selected from the group comprising silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, and aluminum nitride.

30. An electronic system comprising:

a bus coupling components in the electronic system;

a display coupled to the bus;

external memory coupled to the bus; and

a processor coupled to the bus and having an electronic assembly including at least one integrated circuit (IC) package fabricated by;

depositing a no-flow underfill material in an integrated circuit (IC) mounting area of a substrate, the IC mounting area comprising a plurality of pads;

placing an IC on the IC mounting area, such that terminals of the IC are aligned with corresponding pads and substantially enveloped in the underfill material;

applying suitable pressure to cause the terminals to physically contact the pads; and

applying suitable heat to harden the underfill material.

31. The electronic system recited in claim 30 and fabricated such that the operations of applying suitable pressure and suitable heat are performed substantially concurrently by apparatus from the group comprising a thermocompression bonder, an ultrasonic bonder, and a component placement tool.

32. The electronic system recited in claim 30, wherein the underfill material comprises a filler material selected from the group comprising silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, and aluminum nitride.