Multi-phase DC-DC converter

• US 20030081438A1
• Filed: 10/31/2001
• Published: 05/01/2003
• Est. Priority Date: 10/31/2001
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Budelman, Gerald A., Dinh, James S.
• Granted Patent: US 6,650,556 B2
• Time in Patent Office: Days
• US Class Current: 363/127
• CPC Class Codes: H02J 1/102 being switching converters H02J1/108, H02J1/12 take precedence
• CPC Class Codes: H02M 3/1584 with a plurality of power processing stages connected in parallel

Abstract

A multi-phase DC-DC converter having redundant DC-DC phases or modules. If a DC-DC phase fails, such as from a short circuit, it is decoupled from the output of the DC-DC converter. In some embodiments, the other DC-DC phases bear the burden of the extra power output. In other embodiments, additional DC-DC phases are coupled in, in response to the failure.

Claims

1. A DC-DC regulator comprising:

a plurality of DC-DC phases, at least one of which includes,

a regulator, and

a detector shutdown switch coupled to isolate the regulator in response to the regulator having a short-circuit failure.

2. The DC-DC regulator of claim 1 wherein the detector shutdown switch comprises:

a top detector shutdown switch.

3. The DC-DC regulator of claim 1 wherein the detector shutdown switch comprises:

a bottom detector shutdown switch.

4. The DC-DC regulator of claim 1 wherein the detector shutdown switch comprises:

a top detector shutdown switch; and

a bottom detector shutdown switch.

5. The DC-DC regulator of claim 1 wherein the detector shutdown switch is coupled to isolate the regulator from a load.

6. The DC-DC regulator of claim 1 wherein the detector shutdown switch is coupled to isolate the regulator from a regulator of another of the DC-DC phases.

7. The DC-DC regulator of claim 1 wherein the detector shutdown switch comprises:

a field-effect transistor (FET) having a FET body diode coupled to inhibit current flow from a load back into the DC-DC regulator.

8. The DC-DC regulator of claim 1 wherein the regulator comprises:

a synchronous multi-phase buck regulator; and

a duty cycle controller coupled to provide duty cycle signals to the synchronous multi-phase buck regulator.

9. The DC-DC regulator of claim 1 further comprising:

a multi-phase controller coupled to provide respective switching signals to the plurality of DC-DC phases.

10. The DC-DC regulator of claim 9 further comprising:

a startup controller.

11. The DC-DC regulator of claim 1 further comprising:

a redundant DC phase; and

a circuit for connecting the DC phase in response to the short-circuit failure in the at least one of the DC phases.

12. A synchronous multi-phase buck regulator for providing DC voltage to a load and comprising:

a top switch;

a switching node;

a bottom switch coupled to the top switch at the switching node;

an output node for coupling to the load; and

a first shutdown switch coupled in series between the switching node and the output node.

13. The synchronous multi-phase buck regulator of claim 12 wherein the first shutdown switch comprises:

a field-effect transistor (FET) having a FET body diode coupled to inhibit current flow from the output node to the switch node.

14. The synchronous multi-phase buck regulator of claim 13 further comprising:

a comparator having inputs coupled across the FET and an output coupled to a gate of the FET.

15. The synchronous multi-phase buck regulator of claim 14 further comprising:

a resistor coupled in series between the FET and an input of the comparator.

16. The synchronous multi-phase buck regulator of claim 15 further comprising:

another resistor coupled in series between the FET and another input of the comparator.

17. The synchronous multi-phase buck regulator of claim 15 further comprising:

a diode coupled between an input of the comparator and the gate of the FET.

18. The synchronous multi-phase buck regulator of claim 12 for generating the DC voltage from another DC voltage, and further comprising:

an input node for receiving the other DC voltage; and

a second shutdown switch coupled between the input node and the top switch.

19. The synchronous multi-phase buck regulator of claim 12 further comprising:

a phase control input for receiving a switching signal; and

a third switch coupled to the output node and the phase control input node to inhibit the switching signal in response to the synchronous multi-phase buck regulator achieving a normal state of operation.

20. A method of operating a DC-DC converter having multiple DC-DC phases, the method comprising:

detecting a short failure of one of the DC-DC phases; and

responsive to detecting the short failure, isolating the failed DC-DC phase.

21. The method of claim 20 wherein the DC-DC converter is coupled to a load, and wherein:

the isolating comprises isolating the failed DC-DC phase from the load.

22. The method of claim 20 wherein:

the isolating comprises isolating the failed DC-DC phase from a non-failed DC-DC phase.

23. The method of claim 20 wherein the DC-DC converter has a switch node and is coupled to a load, and wherein:

the detecting comprises sensing a current flowing from the load; and

responsive to sensing the current, electrically disconnecting the load from the switch node.

24. The method of claim 20 wherein the DC-DC converter has a voltage input and a switch node, and wherein:

the detecting comprises isolating the switch node from the voltage input.

25. The method of claim 20 wherein the DC-DC converter further has a redundant DC phase which is normally inoperative, the method further comprising:

responsive to detecting the short failure, making the redundant DC phase operative.

26. The method of claim 20 further comprising:

in response to the short failure, at least one of the non-failing DC-DC phases increasing its output to compensate for the isolated failed DC-DC phase.

27. An electronic system comprising:

a load having an input; and

a DC-DC converter including,

a duty cycle controller, and

a plurality of DC-DC phases, each including,

a buck regulator having an input coupled to the duty cycle controller and having a switch node coupled to the input of the load,

a top shutdown switch coupled to the buck regulator, and

a bottom shutdown switch coupled to the buck regulator.

28. The electronic system of claim 27 further comprising:

an AC-DC converter coupled to the DC-DC converter.

29. The electronic system of claim 28 wherein:

the bottom shutdown switch comprises a field effect transistor (FET) having a FET body diode coupled to inhibit current flow from the load to the buck regulator.

30. The electronic system of claim 27 wherein the plurality of DC-DC phases comprises:

a plurality of normal operation DC-DC phases; and

at least one reserve DC-DC phase.

31. An electronic system comprising:

an AC-DC converter having an output; and

a DC-DC converter including,

an input coupled to the output of the AC-DC converter, and

a plurality of DC-DC phases, at least one of which includes, a regulator, and

a detector shutdown switch coupled to isolate the regulator in response to the regulator having a short-circuit failure.

32. The electronic system of claim 31 wherein:

the detector shutdown switch comprises,

a top detector shutdown switch, and

a bottom detector shutdown switch.

33. The electronic system of claim 32 further comprising:

a load coupled to an output of the DC-DC converter.

34. The electronic system of claim 32 wherein:

the output of the DC-DC converter is coupled to respective outputs of each of the plurality of DC-DC phases.

35. The electronic system of claim 32 wherein the plurality of DC-DC phases comprises:

at least one reserve DC-DC phase;

a plurality of normal operation DC-DC phases; and

means, coupled to the detector shutdown switch of at least one of the normal operation DC-DC phases, for bringing the at least one reserve DC-DC phases into normal operation in response to the short-circuit failure.

36. An article of manufacture comprising:

a machine-accessible medium having thereon data which, when accessed by a machine, enable the machine to create a semiconductor device including,

a multi-phase DC-DC converter including,

a synchronous multi-phase buck regulator, and

a shutdown switch coupled to the buck regulator to defeat the buck regulator in response to the buck regulator suffering a short circuit.

37. The article of manufacture of claim 36 wherein the machine-accessible medium has additional data that, when accessed by the machine, enable the machine to include in the multi-phase DC-DC converter:

a field-effect transistor (FET) having a FET body diode coupled to inhibit current flow from a load back into an output of the buck regulator.

38. The article of manufacture of claim 37 wherein the machine-accessible medium has additional data that, when accessed by the machine, enable the machine to include in the multi-phase DC-DC converter:

a reserve DC-DC phase in the multi-phase DC-DC converter.

39. The article of manufacture of claim 37 wherein the machine-accessible medium comprises a recording medium.

40. The article of manufacture of claim 37 wherein the machine-accessible medium comprises a communication link and the data comprise a carrier wave traversing the communication link.