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SYSTEM ADAPTED TO RECEIVE MULTIPLE MEMORY TYPES, AND METHOD FOR DETERMINING A TYPE OF MEMORY PRESENT

  • US 20030084233A1
  • Filed: 06/01/1995
  • Published: 05/01/2003
  • Est. Priority Date: 12/23/1994
  • Status: Active Grant
First Claim
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1. A microprocessor system comprising:

  • a bus for transferring information;

    a memory, coupled to said bus, comprised of a type of memory device which interchangeably a Burst Extended Data Out type memory device or a Fast Page Mode type memory device, said memory having a first set of access control signal timing requirements for the Burst Extended Data Out type memory device and a second set of access control signal timing requirements for the Fast Page Mode type memory device;

    a programmable memory controller, coupled to said bus and to said memory, capable of providing the first set of access control signal timing requirements and the second set of access control signal timing requirements to said memory; and

    a microprocessor, coupled to said bus, said memory and said memory controller, responsive to information from said memory to program said memory controller to provide a set of access control signals to said memory in accordance with the type of memory device said memory is comprised of.

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