Digital-to-analogue converter using an array of current sources

• US 20030085824A1
• Filed: 12/23/2002
• Published: 05/08/2003
• Est. Priority Date: 05/09/2001
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Boxho, Jean
• Granted Patent: US 6,738,000 B2
• Time in Patent Office: Days
• US Class Current: 341/120
• CPC Class Codes: H03M 1/066 by continuously permuting the elements used, i.e. dynamic element matching
• CPC Class Codes: H03M 1/1004 without interrupting normal operation, e.g. by providing an additional component for temporarily replacing components to be tested or calibrated H03M1/1009, H03M1/1071 take precedence
• CPC Class Codes: H03M 1/747 with equal currents which are switched by unary decoded digital signals

Abstract

A current source DAC has calibration of the current sources used for providing the analog output. There are two outputs, one of which provides the output current or else a differential output is provided. The calibration is cyclic and the current source outputs switched to the output terminals are selected as a function of the point within the calibration cycle. The current stage of the cyclic calibration process is thus taken into account in the D/A conversion. For example, the average time since calibration for all current sources having outputs switched to the first output may be approximately equal to the average time since calibration for all current sources having outputs switched to the second output. In this way, the average current of the cells switched to one terminal is identical to the average current of the cells switched to the other terminal, and the average current of the cells switched to each terminal remains constant in time irrespective of the digital signal value being converted. This ensures DAC linearity.

Claims

1. A digital-to-analogue converter, comprising:

an array of current sources, each current source having an output which is switchable onto one of first and second terminals as a function of a digital input, such that a first number of current source outputs are switched to the output terminal and a second number of current source outputs are switched to the output terminal,

wherein the current source outputs are also switchable to a calibration unit, the current sources of the array being calibrated cyclically and wherein the current source outputs switched to the first and second output terminals are selected as a function of the point within the calibration cycle.

2. A converter as claimed in claim 1, wherein the average time since calibration for all current sources having outputs switched to the first output terminal is approximately equal to the average time since calibration for all current sources having outputs switched to the second terminal.

3. A converter as claimed in claim 1, wherein the array of current sources comprises a first plurality of identical current sources, the outputs of which are switched in dependence on the most significant bits of the digital input, and a second plurality of current sources, the outputs of which are switched in dependence on the least significant bits of the digital input.

4. A converter as claimed in claim 3, wherein the second plurality of current sources comprises two current sources, and wherein the output of each current source of the second plurality is provided with a divider arrangement for providing the output on a plurality of lines, the currents on the individual lines being switchable to the first or second terminals under the control of the least significant bits of the input.

5. A converter as claimed in claim 1, wherein the calibration unit is for comparing the output with a reference output.

6. A converter as claimed in claim 5, wherein the reference output is derived from additional current sources distributed within the array.

7. A converter as claimed in claim 1, comprising a 14 bit converter, wherein the array comprises 128 first current sources for the 7 most significant bits and 2 second current sources for the 7 least significant bits.

8. A converter as claimed in claim 2, wherein the current sources most recently calibrated and the current sources calibrated the longest time ago are switched to one of the terminals, thereby approximately equalling the average time since calibration for the current sources switched to the two terminals.

9. A converter as claimed in claim 1, further comprising a calibration unit.

10. A digital-to-analogue converter, comprising:

an array of current sources, each current source having an output which is switchable onto one of first and second terminals as a function of a digital input, such that a first number of current source outputs are switched to the output terminal and a second number of current source outputs are switched to the output terminal; and

a calibration unit for calibrating the current sources,

wherein the current source outputs are also switchable to the calibration unit, the current sources of the array being calibrated cyclically and wherein the current source outputs switched to the first and second output terminals are selected such that the average time since calibration for all current sources having outputs switched to the first output terminal is approximately equal to the average time since calibration for all current sources having outputs switched to the second terminal.

11. A method of controlling a digital-to-analogue converter, the converter comprising an array of current sources, each current source having an output which is switchable onto one of first and second terminals as a function of a digital input, such that a first number of current source outputs are switched to the output terminal and a second number of current source outputs are switched to the output terminal, the method comprising:

cyclically calibrating the current sources of the array;

switching a first subset of the current source outputs to the first terminal and switching a second subset of the current source outputs to the output terminal, the first and second subsets together including all current sources other than the or each current source being calibrated, the switching being in dependence on the input digital signal,

wherein the first and second subsets are selected as a function of the point within the calibration cycle.

12. A method as claimed in claim 11, wherein the average time since calibration for all current sources in the first and second subsets are approximately equal.

13. A method as claimed in claim 12, wherein the current sources most recently calibrated and the current sources calibrated the longest time ago are used to form one subset, and the other current sources, excluding the or each current source being calibrated, are used to form the second subset.