Low power A/D converter

• US 20030088280A1
• Filed: 11/05/2001
• Published: 05/08/2003
• Est. Priority Date: 11/05/2001
• Status: Active Grant

• Current Assignee: Cameron Incorporated (Schlumberger NV)
• Original Assignee: Cameron Incorporated (Schlumberger NV)
• Inventors: Ostroff, Alan H.
• Granted Patent: US 6,927,721 B2
• Time in Patent Office: Days
• US Class Current: 607/5
• CPC Class Codes: H03M 1/48 Servo-type converters
• CPC Class Codes: H03M 1/56 Input signal compared with linear ramp

Abstract

A comparator is arranged to compare a series of analog voltage signal samples on a first capacitor with a voltage on a second capacitor which is linearly increased or decreased to equal the sample value. The comparator'"'"'s single output freezes the count of the counter at counts which are proportional to the voltage of the respective samples. In this manner, analog to digital conversion can be accomplished using a single line between the analog and digital sides of a circuit, thereby reducing parasitic capacitance.

Claims

1. An electrical circuit comprising:

first means for storing an analog sample of a first voltage;

second means for storing an electrical charge to develop a second voltage;

charging means responsive to a plurality of control signals for selectively charging and discharging said means for storing to correspondingly increase or reduce said second voltage; and

means responsive to said first and second voltages for developing a binary count representative of the analog value of said first voltage.

2. The circuit of claim 1 wherein said means for developing a binary count comprises a comparator and an UP/DOWN counter.

3. The circuit of claim 2 wherein, when said first voltage exceeds said second voltage, a first of said control signals causes said charging means to increase said second voltage and, when said first voltage is less than said second voltage, a second of said control signals causes said charging means to reduce said second voltage.

4. The circuit of claim 3 wherein said UP/DOWN counter counts up while said charging means is increasing said second voltage and stops counting up when said first and second voltages become equal.

5. The circuit of claim 4 wherein said UP/DOWN counter counts down while said charging means is decreasing said second voltage and stops counting down when said first and second voltages become equal.

6. The circuit of claim 5 wherein the count of said counter when said counter stops counting is a binary value representative of the value of the analog voltage stored by said first means for storing.

7. The circuit of claim 6 residing in a subcutaneous implantable cardioverter-defibrillator and wherein said analog sample is a sample of an electrocardiogram signal.

8. A method comprising the steps of:

sampling an analog voltage signal to develop a series of voltage samples; and

controlling the count of a digital counter to develop a series of counts, a respective one of the series of counts being proportional to the value of a corresponding one of said series of voltage samples.

9. The method of claim 8 wherein said digital counter is controlled to develop said count by a single lead from an analog circuit.

10. The method of claim 9 wherein said single lead is the output of a comparator.

11. The method of claim 10 wherein said comparator is operative to compare a first analog voltage sample to a second linearly changing voltage and to stop the count of said counter when said first and second voltages are equal.

20. The method of claim 8 wherein said steps are performed to accomplish analog-to-digital conversion in a subcutaneous implantable cardioverter-defibrillator.

12. The electronic apparatus comprising:

a comparator arranged to compare a series of analog voltage signal samples on a first capacitor with a second voltage on a second capacitor, the second voltage being linearly increased or decreased to equal the sample value; and

a counter whose count is frozen at counts which are proportional to the voltage of the respective signal samples in response to an output from said comparator.

13. The apparatus of claim 12 wherein said counter is an UP/DOWN counter.

14. The apparatus of claim 13 further including control logic responsive to an output of said comparator to control said second voltage.

15. The apparatus of claim 14 wherein said comparator and counter cooperate to perform A/D conversion.

16. The apparatus of claim 12 further including a programmed digital processor, said digital processor implementing said counter.

17. The apparatus of claim 14 further including a programmed digital processor programmed to implement said UP/DOWN counter and said control logic.

18. The apparatus of claim 12 wherein a single output line from said comparator interconnects an analog side of said apparatus including said comparator to a digital side of said apparatus including said counter.

19. The apparatus of claim 12 forming part of circuitry comprising a subcutaneous implantable cardioverter-defibrillator and wherein said analog voltage samples comprise samples of an electrocardiogram waveform.