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EFFICIENT COMPLEX MULTIPLICATION AND FAST FOURIER TRANSFORM (FFT) IMPLEMENTATION ON THE MANARRAY ARCHITECTURE

  • US 20030088601A1
  • Filed: 06/22/1999
  • Published: 05/08/2003
  • Est. Priority Date: 10/09/1998
  • Status: Active Grant
First Claim
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1. An apparatus for the efficient processing of complex multiplication computations, the apparatus comprising:

  • at least one controller sequence processor (SP);

    a memory for storing process control instructions;

    a first multiply complex numbers instruction stored in the memory and operative to control the PEs to carry out a multiplication operation involving a pair of complex numbers; and

    hardware for implementing the first multiply complex numbers instruction.

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